diff options
Diffstat (limited to 'drivers/firewire/ohci.c')
-rw-r--r-- | drivers/firewire/ohci.c | 19 |
1 files changed, 14 insertions, 5 deletions
diff --git a/drivers/firewire/ohci.c b/drivers/firewire/ohci.c index 09bba9315de9..a55cf0911b72 100644 --- a/drivers/firewire/ohci.c +++ b/drivers/firewire/ohci.c | |||
@@ -174,6 +174,7 @@ struct fw_ohci { | |||
174 | unsigned int pri_req_max; | 174 | unsigned int pri_req_max; |
175 | u32 bus_time; | 175 | u32 bus_time; |
176 | bool is_root; | 176 | bool is_root; |
177 | bool csr_state_setclear_abdicate; | ||
177 | 178 | ||
178 | /* | 179 | /* |
179 | * Spinlock for accessing fw_ohci data. Never call out of | 180 | * Spinlock for accessing fw_ohci data. Never call out of |
@@ -1529,7 +1530,9 @@ static void bus_reset_tasklet(unsigned long data) | |||
1529 | self_id_count, ohci->self_id_buffer); | 1530 | self_id_count, ohci->self_id_buffer); |
1530 | 1531 | ||
1531 | fw_core_handle_bus_reset(&ohci->card, ohci->node_id, generation, | 1532 | fw_core_handle_bus_reset(&ohci->card, ohci->node_id, generation, |
1532 | self_id_count, ohci->self_id_buffer); | 1533 | self_id_count, ohci->self_id_buffer, |
1534 | ohci->csr_state_setclear_abdicate); | ||
1535 | ohci->csr_state_setclear_abdicate = false; | ||
1533 | } | 1536 | } |
1534 | 1537 | ||
1535 | static irqreturn_t irq_handler(int irq, void *data) | 1538 | static irqreturn_t irq_handler(int irq, void *data) |
@@ -2032,13 +2035,16 @@ static u32 ohci_read_csr_reg(struct fw_card *card, int csr_offset) | |||
2032 | switch (csr_offset) { | 2035 | switch (csr_offset) { |
2033 | case CSR_STATE_CLEAR: | 2036 | case CSR_STATE_CLEAR: |
2034 | case CSR_STATE_SET: | 2037 | case CSR_STATE_SET: |
2035 | /* the controller driver handles only the cmstr bit */ | ||
2036 | if (ohci->is_root && | 2038 | if (ohci->is_root && |
2037 | (reg_read(ohci, OHCI1394_LinkControlSet) & | 2039 | (reg_read(ohci, OHCI1394_LinkControlSet) & |
2038 | OHCI1394_LinkControl_cycleMaster)) | 2040 | OHCI1394_LinkControl_cycleMaster)) |
2039 | return CSR_STATE_BIT_CMSTR; | 2041 | value = CSR_STATE_BIT_CMSTR; |
2040 | else | 2042 | else |
2041 | return 0; | 2043 | value = 0; |
2044 | if (ohci->csr_state_setclear_abdicate) | ||
2045 | value |= CSR_STATE_BIT_ABDICATE; | ||
2046 | |||
2047 | return value; | ||
2042 | 2048 | ||
2043 | case CSR_NODE_IDS: | 2049 | case CSR_NODE_IDS: |
2044 | return reg_read(ohci, OHCI1394_NodeID) << 16; | 2050 | return reg_read(ohci, OHCI1394_NodeID) << 16; |
@@ -2078,12 +2084,13 @@ static void ohci_write_csr_reg(struct fw_card *card, int csr_offset, u32 value) | |||
2078 | 2084 | ||
2079 | switch (csr_offset) { | 2085 | switch (csr_offset) { |
2080 | case CSR_STATE_CLEAR: | 2086 | case CSR_STATE_CLEAR: |
2081 | /* the controller driver handles only the cmstr bit */ | ||
2082 | if ((value & CSR_STATE_BIT_CMSTR) && ohci->is_root) { | 2087 | if ((value & CSR_STATE_BIT_CMSTR) && ohci->is_root) { |
2083 | reg_write(ohci, OHCI1394_LinkControlClear, | 2088 | reg_write(ohci, OHCI1394_LinkControlClear, |
2084 | OHCI1394_LinkControl_cycleMaster); | 2089 | OHCI1394_LinkControl_cycleMaster); |
2085 | flush_writes(ohci); | 2090 | flush_writes(ohci); |
2086 | } | 2091 | } |
2092 | if (value & CSR_STATE_BIT_ABDICATE) | ||
2093 | ohci->csr_state_setclear_abdicate = false; | ||
2087 | break; | 2094 | break; |
2088 | 2095 | ||
2089 | case CSR_STATE_SET: | 2096 | case CSR_STATE_SET: |
@@ -2092,6 +2099,8 @@ static void ohci_write_csr_reg(struct fw_card *card, int csr_offset, u32 value) | |||
2092 | OHCI1394_LinkControl_cycleMaster); | 2099 | OHCI1394_LinkControl_cycleMaster); |
2093 | flush_writes(ohci); | 2100 | flush_writes(ohci); |
2094 | } | 2101 | } |
2102 | if (value & CSR_STATE_BIT_ABDICATE) | ||
2103 | ohci->csr_state_setclear_abdicate = true; | ||
2095 | break; | 2104 | break; |
2096 | 2105 | ||
2097 | case CSR_NODE_IDS: | 2106 | case CSR_NODE_IDS: |