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-rw-r--r--drivers/edac/amd64_edac.c47
-rw-r--r--drivers/edac/amd64_edac.h1
2 files changed, 1 insertions, 47 deletions
diff --git a/drivers/edac/amd64_edac.c b/drivers/edac/amd64_edac.c
index d9cde7132e89..351334ead69d 100644
--- a/drivers/edac/amd64_edac.c
+++ b/drivers/edac/amd64_edac.c
@@ -1739,42 +1739,6 @@ static void amd64_debug_display_dimm_sizes(int ctrl, struct amd64_pvt *pvt)
1739} 1739}
1740 1740
1741/* 1741/*
1742 * Very early hardware probe on pci_probe thread to determine if this module
1743 * supports the hardware.
1744 *
1745 * Return:
1746 * 0 for OK
1747 * 1 for error
1748 */
1749static int f10_probe_valid_hardware(struct amd64_pvt *pvt)
1750{
1751 int ret = 0;
1752
1753 /*
1754 * If we are on a DDR3 machine, we don't know yet if
1755 * we support that properly at this time
1756 */
1757 if ((pvt->dchr0 & DDR3_MODE) ||
1758 (pvt->dchr1 & DDR3_MODE)) {
1759
1760 amd64_printk(KERN_WARNING,
1761 "%s() This machine is running with DDR3 memory. "
1762 "This is not currently supported. "
1763 "DCHR0=0x%x DCHR1=0x%x\n",
1764 __func__, pvt->dchr0, pvt->dchr1);
1765
1766 amd64_printk(KERN_WARNING,
1767 " Contact '%s' module MAINTAINER to help add"
1768 " support.\n",
1769 EDAC_MOD_STR);
1770
1771 ret = 1;
1772
1773 }
1774 return ret;
1775}
1776
1777/*
1778 * There currently are 3 types type of MC devices for AMD Athlon/Opterons 1742 * There currently are 3 types type of MC devices for AMD Athlon/Opterons
1779 * (as per PCI DEVICE_IDs): 1743 * (as per PCI DEVICE_IDs):
1780 * 1744 *
@@ -1803,7 +1767,6 @@ static struct amd64_family_type amd64_family_types[] = {
1803 .addr_f1_ctl = PCI_DEVICE_ID_AMD_10H_NB_MAP, 1767 .addr_f1_ctl = PCI_DEVICE_ID_AMD_10H_NB_MAP,
1804 .misc_f3_ctl = PCI_DEVICE_ID_AMD_10H_NB_MISC, 1768 .misc_f3_ctl = PCI_DEVICE_ID_AMD_10H_NB_MISC,
1805 .ops = { 1769 .ops = {
1806 .probe_valid_hardware = f10_probe_valid_hardware,
1807 .early_channel_count = f10_early_channel_count, 1770 .early_channel_count = f10_early_channel_count,
1808 .get_error_address = f10_get_error_address, 1771 .get_error_address = f10_get_error_address,
1809 .read_dram_base_limit = f10_read_dram_base_limit, 1772 .read_dram_base_limit = f10_read_dram_base_limit,
@@ -1817,7 +1780,6 @@ static struct amd64_family_type amd64_family_types[] = {
1817 .addr_f1_ctl = PCI_DEVICE_ID_AMD_11H_NB_MAP, 1780 .addr_f1_ctl = PCI_DEVICE_ID_AMD_11H_NB_MAP,
1818 .misc_f3_ctl = PCI_DEVICE_ID_AMD_11H_NB_MISC, 1781 .misc_f3_ctl = PCI_DEVICE_ID_AMD_11H_NB_MISC,
1819 .ops = { 1782 .ops = {
1820 .probe_valid_hardware = f10_probe_valid_hardware,
1821 .early_channel_count = f10_early_channel_count, 1783 .early_channel_count = f10_early_channel_count,
1822 .get_error_address = f10_get_error_address, 1784 .get_error_address = f10_get_error_address,
1823 .read_dram_base_limit = f10_read_dram_base_limit, 1785 .read_dram_base_limit = f10_read_dram_base_limit,
@@ -2851,17 +2813,10 @@ static int amd64_init_2nd_stage(struct amd64_pvt *pvt)
2851{ 2813{
2852 int node_id = pvt->mc_node_id; 2814 int node_id = pvt->mc_node_id;
2853 struct mem_ctl_info *mci; 2815 struct mem_ctl_info *mci;
2854 int ret, err = 0; 2816 int ret;
2855 2817
2856 amd64_read_mc_registers(pvt); 2818 amd64_read_mc_registers(pvt);
2857 2819
2858 ret = -ENODEV;
2859 if (pvt->ops->probe_valid_hardware) {
2860 err = pvt->ops->probe_valid_hardware(pvt);
2861 if (err)
2862 goto err_exit;
2863 }
2864
2865 /* 2820 /*
2866 * We need to determine how many memory channels there are. Then use 2821 * We need to determine how many memory channels there are. Then use
2867 * that information for calculating the size of the dynamic instance 2822 * that information for calculating the size of the dynamic instance
diff --git a/drivers/edac/amd64_edac.h b/drivers/edac/amd64_edac.h
index f8c187ea6e38..e84f164034dd 100644
--- a/drivers/edac/amd64_edac.h
+++ b/drivers/edac/amd64_edac.h
@@ -526,7 +526,6 @@ extern struct mcidev_sysfs_attribute amd64_dbg_attrs[NUM_DBG_ATTRS],
526 * functions and per device encoding/decoding logic. 526 * functions and per device encoding/decoding logic.
527 */ 527 */
528struct low_ops { 528struct low_ops {
529 int (*probe_valid_hardware) (struct amd64_pvt *pvt);
530 int (*early_channel_count) (struct amd64_pvt *pvt); 529 int (*early_channel_count) (struct amd64_pvt *pvt);
531 530
532 u64 (*get_error_address) (struct mem_ctl_info *mci, 531 u64 (*get_error_address) (struct mem_ctl_info *mci,