diff options
Diffstat (limited to 'drivers/edac')
-rw-r--r-- | drivers/edac/i5000_edac.c | 20 | ||||
-rw-r--r-- | drivers/edac/i5400_edac.c | 20 | ||||
-rw-r--r-- | drivers/edac/i82443bxgx_edac.c | 22 |
3 files changed, 31 insertions, 31 deletions
diff --git a/drivers/edac/i5000_edac.c b/drivers/edac/i5000_edac.c index adc10a2ac5f6..996c1bdb5a34 100644 --- a/drivers/edac/i5000_edac.c +++ b/drivers/edac/i5000_edac.c | |||
@@ -774,7 +774,7 @@ static void i5000_clear_error(struct mem_ctl_info *mci) | |||
774 | static void i5000_check_error(struct mem_ctl_info *mci) | 774 | static void i5000_check_error(struct mem_ctl_info *mci) |
775 | { | 775 | { |
776 | struct i5000_error_info info; | 776 | struct i5000_error_info info; |
777 | debugf4("MC%d: " __FILE__ ": %s()\n", mci->mc_idx, __func__); | 777 | debugf4("MC%d: %s: %s()\n", mci->mc_idx, __FILE__, __func__); |
778 | i5000_get_error_info(mci, &info); | 778 | i5000_get_error_info(mci, &info); |
779 | i5000_process_error_info(mci, &info, 1); | 779 | i5000_process_error_info(mci, &info, 1); |
780 | } | 780 | } |
@@ -1353,8 +1353,8 @@ static int i5000_probe1(struct pci_dev *pdev, int dev_idx) | |||
1353 | int num_dimms_per_channel; | 1353 | int num_dimms_per_channel; |
1354 | int num_csrows; | 1354 | int num_csrows; |
1355 | 1355 | ||
1356 | debugf0("MC: " __FILE__ ": %s(), pdev bus %u dev=0x%x fn=0x%x\n", | 1356 | debugf0("MC: %s: %s(), pdev bus %u dev=0x%x fn=0x%x\n", |
1357 | __func__, | 1357 | __FILE__, __func__, |
1358 | pdev->bus->number, | 1358 | pdev->bus->number, |
1359 | PCI_SLOT(pdev->devfn), PCI_FUNC(pdev->devfn)); | 1359 | PCI_SLOT(pdev->devfn), PCI_FUNC(pdev->devfn)); |
1360 | 1360 | ||
@@ -1389,7 +1389,7 @@ static int i5000_probe1(struct pci_dev *pdev, int dev_idx) | |||
1389 | return -ENOMEM; | 1389 | return -ENOMEM; |
1390 | 1390 | ||
1391 | kobject_get(&mci->edac_mci_kobj); | 1391 | kobject_get(&mci->edac_mci_kobj); |
1392 | debugf0("MC: " __FILE__ ": %s(): mci = %p\n", __func__, mci); | 1392 | debugf0("MC: %s: %s(): mci = %p\n", __FILE__, __func__, mci); |
1393 | 1393 | ||
1394 | mci->dev = &pdev->dev; /* record ptr to the generic device */ | 1394 | mci->dev = &pdev->dev; /* record ptr to the generic device */ |
1395 | 1395 | ||
@@ -1432,8 +1432,8 @@ static int i5000_probe1(struct pci_dev *pdev, int dev_idx) | |||
1432 | 1432 | ||
1433 | /* add this new MC control structure to EDAC's list of MCs */ | 1433 | /* add this new MC control structure to EDAC's list of MCs */ |
1434 | if (edac_mc_add_mc(mci)) { | 1434 | if (edac_mc_add_mc(mci)) { |
1435 | debugf0("MC: " __FILE__ | 1435 | debugf0("MC: %s: %s(): failed edac_mc_add_mc()\n", |
1436 | ": %s(): failed edac_mc_add_mc()\n", __func__); | 1436 | __FILE__, __func__); |
1437 | /* FIXME: perhaps some code should go here that disables error | 1437 | /* FIXME: perhaps some code should go here that disables error |
1438 | * reporting if we just enabled it | 1438 | * reporting if we just enabled it |
1439 | */ | 1439 | */ |
@@ -1478,7 +1478,7 @@ static int __devinit i5000_init_one(struct pci_dev *pdev, | |||
1478 | { | 1478 | { |
1479 | int rc; | 1479 | int rc; |
1480 | 1480 | ||
1481 | debugf0("MC: " __FILE__ ": %s()\n", __func__); | 1481 | debugf0("MC: %s: %s()\n", __FILE__, __func__); |
1482 | 1482 | ||
1483 | /* wake up device */ | 1483 | /* wake up device */ |
1484 | rc = pci_enable_device(pdev); | 1484 | rc = pci_enable_device(pdev); |
@@ -1497,7 +1497,7 @@ static void __devexit i5000_remove_one(struct pci_dev *pdev) | |||
1497 | { | 1497 | { |
1498 | struct mem_ctl_info *mci; | 1498 | struct mem_ctl_info *mci; |
1499 | 1499 | ||
1500 | debugf0(__FILE__ ": %s()\n", __func__); | 1500 | debugf0("%s: %s()\n", __FILE__, __func__); |
1501 | 1501 | ||
1502 | if (i5000_pci) | 1502 | if (i5000_pci) |
1503 | edac_pci_release_generic_ctl(i5000_pci); | 1503 | edac_pci_release_generic_ctl(i5000_pci); |
@@ -1544,7 +1544,7 @@ static int __init i5000_init(void) | |||
1544 | { | 1544 | { |
1545 | int pci_rc; | 1545 | int pci_rc; |
1546 | 1546 | ||
1547 | debugf2("MC: " __FILE__ ": %s()\n", __func__); | 1547 | debugf2("MC: %s: %s()\n", __FILE__, __func__); |
1548 | 1548 | ||
1549 | /* Ensure that the OPSTATE is set correctly for POLL or NMI */ | 1549 | /* Ensure that the OPSTATE is set correctly for POLL or NMI */ |
1550 | opstate_init(); | 1550 | opstate_init(); |
@@ -1560,7 +1560,7 @@ static int __init i5000_init(void) | |||
1560 | */ | 1560 | */ |
1561 | static void __exit i5000_exit(void) | 1561 | static void __exit i5000_exit(void) |
1562 | { | 1562 | { |
1563 | debugf2("MC: " __FILE__ ": %s()\n", __func__); | 1563 | debugf2("MC: %s: %s()\n", __FILE__, __func__); |
1564 | pci_unregister_driver(&i5000_driver); | 1564 | pci_unregister_driver(&i5000_driver); |
1565 | } | 1565 | } |
1566 | 1566 | ||
diff --git a/drivers/edac/i5400_edac.c b/drivers/edac/i5400_edac.c index f99d10655ed4..010c1d6526f5 100644 --- a/drivers/edac/i5400_edac.c +++ b/drivers/edac/i5400_edac.c | |||
@@ -694,7 +694,7 @@ static void i5400_clear_error(struct mem_ctl_info *mci) | |||
694 | static void i5400_check_error(struct mem_ctl_info *mci) | 694 | static void i5400_check_error(struct mem_ctl_info *mci) |
695 | { | 695 | { |
696 | struct i5400_error_info info; | 696 | struct i5400_error_info info; |
697 | debugf4("MC%d: " __FILE__ ": %s()\n", mci->mc_idx, __func__); | 697 | debugf4("MC%d: %s: %s()\n", mci->mc_idx, __FILE__, __func__); |
698 | i5400_get_error_info(mci, &info); | 698 | i5400_get_error_info(mci, &info); |
699 | i5400_process_error_info(mci, &info); | 699 | i5400_process_error_info(mci, &info); |
700 | } | 700 | } |
@@ -1227,8 +1227,8 @@ static int i5400_probe1(struct pci_dev *pdev, int dev_idx) | |||
1227 | if (dev_idx >= ARRAY_SIZE(i5400_devs)) | 1227 | if (dev_idx >= ARRAY_SIZE(i5400_devs)) |
1228 | return -EINVAL; | 1228 | return -EINVAL; |
1229 | 1229 | ||
1230 | debugf0("MC: " __FILE__ ": %s(), pdev bus %u dev=0x%x fn=0x%x\n", | 1230 | debugf0("MC: %s: %s(), pdev bus %u dev=0x%x fn=0x%x\n", |
1231 | __func__, | 1231 | __FILE__, __func__, |
1232 | pdev->bus->number, | 1232 | pdev->bus->number, |
1233 | PCI_SLOT(pdev->devfn), PCI_FUNC(pdev->devfn)); | 1233 | PCI_SLOT(pdev->devfn), PCI_FUNC(pdev->devfn)); |
1234 | 1234 | ||
@@ -1256,7 +1256,7 @@ static int i5400_probe1(struct pci_dev *pdev, int dev_idx) | |||
1256 | if (mci == NULL) | 1256 | if (mci == NULL) |
1257 | return -ENOMEM; | 1257 | return -ENOMEM; |
1258 | 1258 | ||
1259 | debugf0("MC: " __FILE__ ": %s(): mci = %p\n", __func__, mci); | 1259 | debugf0("MC: %s: %s(): mci = %p\n", __FILE__, __func__, mci); |
1260 | 1260 | ||
1261 | mci->dev = &pdev->dev; /* record ptr to the generic device */ | 1261 | mci->dev = &pdev->dev; /* record ptr to the generic device */ |
1262 | 1262 | ||
@@ -1299,8 +1299,8 @@ static int i5400_probe1(struct pci_dev *pdev, int dev_idx) | |||
1299 | 1299 | ||
1300 | /* add this new MC control structure to EDAC's list of MCs */ | 1300 | /* add this new MC control structure to EDAC's list of MCs */ |
1301 | if (edac_mc_add_mc(mci)) { | 1301 | if (edac_mc_add_mc(mci)) { |
1302 | debugf0("MC: " __FILE__ | 1302 | debugf0("MC: %s: %s(): failed edac_mc_add_mc()\n", |
1303 | ": %s(): failed edac_mc_add_mc()\n", __func__); | 1303 | __FILE__, __func__); |
1304 | /* FIXME: perhaps some code should go here that disables error | 1304 | /* FIXME: perhaps some code should go here that disables error |
1305 | * reporting if we just enabled it | 1305 | * reporting if we just enabled it |
1306 | */ | 1306 | */ |
@@ -1344,7 +1344,7 @@ static int __devinit i5400_init_one(struct pci_dev *pdev, | |||
1344 | { | 1344 | { |
1345 | int rc; | 1345 | int rc; |
1346 | 1346 | ||
1347 | debugf0("MC: " __FILE__ ": %s()\n", __func__); | 1347 | debugf0("MC: %s: %s()\n", __FILE__, __func__); |
1348 | 1348 | ||
1349 | /* wake up device */ | 1349 | /* wake up device */ |
1350 | rc = pci_enable_device(pdev); | 1350 | rc = pci_enable_device(pdev); |
@@ -1363,7 +1363,7 @@ static void __devexit i5400_remove_one(struct pci_dev *pdev) | |||
1363 | { | 1363 | { |
1364 | struct mem_ctl_info *mci; | 1364 | struct mem_ctl_info *mci; |
1365 | 1365 | ||
1366 | debugf0(__FILE__ ": %s()\n", __func__); | 1366 | debugf0("%s: %s()\n", __FILE__, __func__); |
1367 | 1367 | ||
1368 | if (i5400_pci) | 1368 | if (i5400_pci) |
1369 | edac_pci_release_generic_ctl(i5400_pci); | 1369 | edac_pci_release_generic_ctl(i5400_pci); |
@@ -1409,7 +1409,7 @@ static int __init i5400_init(void) | |||
1409 | { | 1409 | { |
1410 | int pci_rc; | 1410 | int pci_rc; |
1411 | 1411 | ||
1412 | debugf2("MC: " __FILE__ ": %s()\n", __func__); | 1412 | debugf2("MC: %s: %s()\n", __FILE__, __func__); |
1413 | 1413 | ||
1414 | /* Ensure that the OPSTATE is set correctly for POLL or NMI */ | 1414 | /* Ensure that the OPSTATE is set correctly for POLL or NMI */ |
1415 | opstate_init(); | 1415 | opstate_init(); |
@@ -1425,7 +1425,7 @@ static int __init i5400_init(void) | |||
1425 | */ | 1425 | */ |
1426 | static void __exit i5400_exit(void) | 1426 | static void __exit i5400_exit(void) |
1427 | { | 1427 | { |
1428 | debugf2("MC: " __FILE__ ": %s()\n", __func__); | 1428 | debugf2("MC: %s: %s()\n", __FILE__, __func__); |
1429 | pci_unregister_driver(&i5400_driver); | 1429 | pci_unregister_driver(&i5400_driver); |
1430 | } | 1430 | } |
1431 | 1431 | ||
diff --git a/drivers/edac/i82443bxgx_edac.c b/drivers/edac/i82443bxgx_edac.c index 2bf2c5051bfe..a2fa1feed724 100644 --- a/drivers/edac/i82443bxgx_edac.c +++ b/drivers/edac/i82443bxgx_edac.c | |||
@@ -178,7 +178,7 @@ static void i82443bxgx_edacmc_check(struct mem_ctl_info *mci) | |||
178 | { | 178 | { |
179 | struct i82443bxgx_edacmc_error_info info; | 179 | struct i82443bxgx_edacmc_error_info info; |
180 | 180 | ||
181 | debugf1("MC%d: " __FILE__ ": %s()\n", mci->mc_idx, __func__); | 181 | debugf1("MC%d: %s: %s()\n", mci->mc_idx, __FILE__, __func__); |
182 | i82443bxgx_edacmc_get_error_info(mci, &info); | 182 | i82443bxgx_edacmc_get_error_info(mci, &info); |
183 | i82443bxgx_edacmc_process_error_info(mci, &info, 1); | 183 | i82443bxgx_edacmc_process_error_info(mci, &info, 1); |
184 | } | 184 | } |
@@ -198,13 +198,13 @@ static void i82443bxgx_init_csrows(struct mem_ctl_info *mci, | |||
198 | for (index = 0; index < mci->nr_csrows; index++) { | 198 | for (index = 0; index < mci->nr_csrows; index++) { |
199 | csrow = &mci->csrows[index]; | 199 | csrow = &mci->csrows[index]; |
200 | pci_read_config_byte(pdev, I82443BXGX_DRB + index, &drbar); | 200 | pci_read_config_byte(pdev, I82443BXGX_DRB + index, &drbar); |
201 | debugf1("MC%d: " __FILE__ ": %s() Row=%d DRB = %#0x\n", | 201 | debugf1("MC%d: %s: %s() Row=%d DRB = %#0x\n", |
202 | mci->mc_idx, __func__, index, drbar); | 202 | mci->mc_idx, __FILE__, __func__, index, drbar); |
203 | row_high_limit = ((u32) drbar << 23); | 203 | row_high_limit = ((u32) drbar << 23); |
204 | /* find the DRAM Chip Select Base address and mask */ | 204 | /* find the DRAM Chip Select Base address and mask */ |
205 | debugf1("MC%d: " __FILE__ ": %s() Row=%d, " | 205 | debugf1("MC%d: %s: %s() Row=%d, " |
206 | "Boundry Address=%#0x, Last = %#0x \n", | 206 | "Boundry Address=%#0x, Last = %#0x\n", |
207 | mci->mc_idx, __func__, index, row_high_limit, | 207 | mci->mc_idx, __FILE__, __func__, index, row_high_limit, |
208 | row_high_limit_last); | 208 | row_high_limit_last); |
209 | 209 | ||
210 | /* 440GX goes to 2GB, represented with a DRB of 0. */ | 210 | /* 440GX goes to 2GB, represented with a DRB of 0. */ |
@@ -237,7 +237,7 @@ static int i82443bxgx_edacmc_probe1(struct pci_dev *pdev, int dev_idx) | |||
237 | enum mem_type mtype; | 237 | enum mem_type mtype; |
238 | enum edac_type edac_mode; | 238 | enum edac_type edac_mode; |
239 | 239 | ||
240 | debugf0("MC: " __FILE__ ": %s()\n", __func__); | 240 | debugf0("MC: %s: %s()\n", __FILE__, __func__); |
241 | 241 | ||
242 | /* Something is really hosed if PCI config space reads from | 242 | /* Something is really hosed if PCI config space reads from |
243 | * the MC aren't working. | 243 | * the MC aren't working. |
@@ -250,7 +250,7 @@ static int i82443bxgx_edacmc_probe1(struct pci_dev *pdev, int dev_idx) | |||
250 | if (mci == NULL) | 250 | if (mci == NULL) |
251 | return -ENOMEM; | 251 | return -ENOMEM; |
252 | 252 | ||
253 | debugf0("MC: " __FILE__ ": %s(): mci = %p\n", __func__, mci); | 253 | debugf0("MC: %s: %s(): mci = %p\n", __FILE__, __func__, mci); |
254 | mci->dev = &pdev->dev; | 254 | mci->dev = &pdev->dev; |
255 | mci->mtype_cap = MEM_FLAG_EDO | MEM_FLAG_SDR | MEM_FLAG_RDR; | 255 | mci->mtype_cap = MEM_FLAG_EDO | MEM_FLAG_SDR | MEM_FLAG_RDR; |
256 | mci->edac_ctl_cap = EDAC_FLAG_NONE | EDAC_FLAG_EC | EDAC_FLAG_SECDED; | 256 | mci->edac_ctl_cap = EDAC_FLAG_NONE | EDAC_FLAG_EC | EDAC_FLAG_SECDED; |
@@ -336,7 +336,7 @@ static int i82443bxgx_edacmc_probe1(struct pci_dev *pdev, int dev_idx) | |||
336 | __func__); | 336 | __func__); |
337 | } | 337 | } |
338 | 338 | ||
339 | debugf3("MC: " __FILE__ ": %s(): success\n", __func__); | 339 | debugf3("MC: %s: %s(): success\n", __FILE__, __func__); |
340 | return 0; | 340 | return 0; |
341 | 341 | ||
342 | fail: | 342 | fail: |
@@ -352,7 +352,7 @@ static int __devinit i82443bxgx_edacmc_init_one(struct pci_dev *pdev, | |||
352 | { | 352 | { |
353 | int rc; | 353 | int rc; |
354 | 354 | ||
355 | debugf0("MC: " __FILE__ ": %s()\n", __func__); | 355 | debugf0("MC: %s: %s()\n", __FILE__, __func__); |
356 | 356 | ||
357 | /* don't need to call pci_enable_device() */ | 357 | /* don't need to call pci_enable_device() */ |
358 | rc = i82443bxgx_edacmc_probe1(pdev, ent->driver_data); | 358 | rc = i82443bxgx_edacmc_probe1(pdev, ent->driver_data); |
@@ -367,7 +367,7 @@ static void __devexit i82443bxgx_edacmc_remove_one(struct pci_dev *pdev) | |||
367 | { | 367 | { |
368 | struct mem_ctl_info *mci; | 368 | struct mem_ctl_info *mci; |
369 | 369 | ||
370 | debugf0(__FILE__ ": %s()\n", __func__); | 370 | debugf0("%s: %s()\n", __FILE__, __func__); |
371 | 371 | ||
372 | if (i82443bxgx_pci) | 372 | if (i82443bxgx_pci) |
373 | edac_pci_release_generic_ctl(i82443bxgx_pci); | 373 | edac_pci_release_generic_ctl(i82443bxgx_pci); |