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-rw-r--r--drivers/edac/i5000_edac.c2
-rw-r--r--drivers/edac/i5400_edac.c2
-rw-r--r--drivers/edac/mpc85xx_edac.c16
3 files changed, 13 insertions, 7 deletions
diff --git a/drivers/edac/i5000_edac.c b/drivers/edac/i5000_edac.c
index 996c1bdb5a34..a5cefab8d65d 100644
--- a/drivers/edac/i5000_edac.c
+++ b/drivers/edac/i5000_edac.c
@@ -1482,7 +1482,7 @@ static int __devinit i5000_init_one(struct pci_dev *pdev,
1482 1482
1483 /* wake up device */ 1483 /* wake up device */
1484 rc = pci_enable_device(pdev); 1484 rc = pci_enable_device(pdev);
1485 if (rc == -EIO) 1485 if (rc)
1486 return rc; 1486 return rc;
1487 1487
1488 /* now probe and enable the device */ 1488 /* now probe and enable the device */
diff --git a/drivers/edac/i5400_edac.c b/drivers/edac/i5400_edac.c
index 010c1d6526f5..38a9be9e1c7c 100644
--- a/drivers/edac/i5400_edac.c
+++ b/drivers/edac/i5400_edac.c
@@ -1348,7 +1348,7 @@ static int __devinit i5400_init_one(struct pci_dev *pdev,
1348 1348
1349 /* wake up device */ 1349 /* wake up device */
1350 rc = pci_enable_device(pdev); 1350 rc = pci_enable_device(pdev);
1351 if (rc == -EIO) 1351 if (rc)
1352 return rc; 1352 return rc;
1353 1353
1354 /* now probe and enable the device */ 1354 /* now probe and enable the device */
diff --git a/drivers/edac/mpc85xx_edac.c b/drivers/edac/mpc85xx_edac.c
index 8ea07b019543..b123bb308a4a 100644
--- a/drivers/edac/mpc85xx_edac.c
+++ b/drivers/edac/mpc85xx_edac.c
@@ -43,7 +43,7 @@ static u32 orig_pci_err_en;
43#endif 43#endif
44 44
45static u32 orig_l2_err_disable; 45static u32 orig_l2_err_disable;
46#ifdef CONFIG_MPC85xx 46#ifdef CONFIG_FSL_SOC_BOOKE
47static u32 orig_hid1[2]; 47static u32 orig_hid1[2];
48#endif 48#endif
49 49
@@ -647,7 +647,10 @@ static struct of_device_id mpc85xx_l2_err_of_match[] = {
647 { .compatible = "fsl,mpc8555-l2-cache-controller", }, 647 { .compatible = "fsl,mpc8555-l2-cache-controller", },
648 { .compatible = "fsl,mpc8560-l2-cache-controller", }, 648 { .compatible = "fsl,mpc8560-l2-cache-controller", },
649 { .compatible = "fsl,mpc8568-l2-cache-controller", }, 649 { .compatible = "fsl,mpc8568-l2-cache-controller", },
650 { .compatible = "fsl,mpc8569-l2-cache-controller", },
650 { .compatible = "fsl,mpc8572-l2-cache-controller", }, 651 { .compatible = "fsl,mpc8572-l2-cache-controller", },
652 { .compatible = "fsl,p1020-l2-cache-controller", },
653 { .compatible = "fsl,p1021-l2-cache-controller", },
651 { .compatible = "fsl,p2020-l2-cache-controller", }, 654 { .compatible = "fsl,p2020-l2-cache-controller", },
652 {}, 655 {},
653}; 656};
@@ -1125,7 +1128,10 @@ static struct of_device_id mpc85xx_mc_err_of_match[] = {
1125 { .compatible = "fsl,mpc8569-memory-controller", }, 1128 { .compatible = "fsl,mpc8569-memory-controller", },
1126 { .compatible = "fsl,mpc8572-memory-controller", }, 1129 { .compatible = "fsl,mpc8572-memory-controller", },
1127 { .compatible = "fsl,mpc8349-memory-controller", }, 1130 { .compatible = "fsl,mpc8349-memory-controller", },
1131 { .compatible = "fsl,p1020-memory-controller", },
1132 { .compatible = "fsl,p1021-memory-controller", },
1128 { .compatible = "fsl,p2020-memory-controller", }, 1133 { .compatible = "fsl,p2020-memory-controller", },
1134 { .compatible = "fsl,p4080-memory-controller", },
1129 {}, 1135 {},
1130}; 1136};
1131MODULE_DEVICE_TABLE(of, mpc85xx_mc_err_of_match); 1137MODULE_DEVICE_TABLE(of, mpc85xx_mc_err_of_match);
@@ -1140,7 +1146,7 @@ static struct of_platform_driver mpc85xx_mc_err_driver = {
1140 }, 1146 },
1141}; 1147};
1142 1148
1143#ifdef CONFIG_MPC85xx 1149#ifdef CONFIG_FSL_SOC_BOOKE
1144static void __init mpc85xx_mc_clear_rfxe(void *data) 1150static void __init mpc85xx_mc_clear_rfxe(void *data)
1145{ 1151{
1146 orig_hid1[smp_processor_id()] = mfspr(SPRN_HID1); 1152 orig_hid1[smp_processor_id()] = mfspr(SPRN_HID1);
@@ -1179,7 +1185,7 @@ static int __init mpc85xx_mc_init(void)
1179 printk(KERN_WARNING EDAC_MOD_STR "PCI fails to register\n"); 1185 printk(KERN_WARNING EDAC_MOD_STR "PCI fails to register\n");
1180#endif 1186#endif
1181 1187
1182#ifdef CONFIG_MPC85xx 1188#ifdef CONFIG_FSL_SOC_BOOKE
1183 /* 1189 /*
1184 * need to clear HID1[RFXE] to disable machine check int 1190 * need to clear HID1[RFXE] to disable machine check int
1185 * so we can catch it 1191 * so we can catch it
@@ -1193,7 +1199,7 @@ static int __init mpc85xx_mc_init(void)
1193 1199
1194module_init(mpc85xx_mc_init); 1200module_init(mpc85xx_mc_init);
1195 1201
1196#ifdef CONFIG_MPC85xx 1202#ifdef CONFIG_FSL_SOC_BOOKE
1197static void __exit mpc85xx_mc_restore_hid1(void *data) 1203static void __exit mpc85xx_mc_restore_hid1(void *data)
1198{ 1204{
1199 mtspr(SPRN_HID1, orig_hid1[smp_processor_id()]); 1205 mtspr(SPRN_HID1, orig_hid1[smp_processor_id()]);
@@ -1202,7 +1208,7 @@ static void __exit mpc85xx_mc_restore_hid1(void *data)
1202 1208
1203static void __exit mpc85xx_mc_exit(void) 1209static void __exit mpc85xx_mc_exit(void)
1204{ 1210{
1205#ifdef CONFIG_MPC85xx 1211#ifdef CONFIG_FSL_SOC_BOOKE
1206 on_each_cpu(mpc85xx_mc_restore_hid1, NULL, 0); 1212 on_each_cpu(mpc85xx_mc_restore_hid1, NULL, 0);
1207#endif 1213#endif
1208#ifdef CONFIG_PCI 1214#ifdef CONFIG_PCI