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-rw-r--r--drivers/edac/sb_edac.c6
1 files changed, 3 insertions, 3 deletions
diff --git a/drivers/edac/sb_edac.c b/drivers/edac/sb_edac.c
index a203536d90dd..123204f8e23b 100644
--- a/drivers/edac/sb_edac.c
+++ b/drivers/edac/sb_edac.c
@@ -58,7 +58,7 @@ static int probed;
58 58
59/* 59/*
60 * FIXME: For now, let's order by device function, as it makes 60 * FIXME: For now, let's order by device function, as it makes
61 * easier for driver's development proccess. This table should be 61 * easier for driver's development process. This table should be
62 * moved to pci_id.h when submitted upstream 62 * moved to pci_id.h when submitted upstream
63 */ 63 */
64#define PCI_DEVICE_ID_INTEL_SBRIDGE_SAD0 0x3cf4 /* 12.6 */ 64#define PCI_DEVICE_ID_INTEL_SBRIDGE_SAD0 0x3cf4 /* 12.6 */
@@ -375,7 +375,7 @@ static DEFINE_PCI_DEVICE_TABLE(sbridge_pci_tbl) = {
375 375
376 376
377/**************************************************************************** 377/****************************************************************************
378 Anciliary status routines 378 Ancillary status routines
379 ****************************************************************************/ 379 ****************************************************************************/
380 380
381static inline int numrank(u32 mtr) 381static inline int numrank(u32 mtr)
@@ -1430,7 +1430,7 @@ static void sbridge_mce_output_error(struct mem_ctl_info *mci,
1430 type = "FATAL"; 1430 type = "FATAL";
1431 1431
1432 /* 1432 /*
1433 * According with Table 15-9 of the Intel Archictecture spec vol 3A, 1433 * According with Table 15-9 of the Intel Architecture spec vol 3A,
1434 * memory errors should fit in this mask: 1434 * memory errors should fit in this mask:
1435 * 000f 0000 1mmm cccc (binary) 1435 * 000f 0000 1mmm cccc (binary)
1436 * where: 1436 * where: