diff options
Diffstat (limited to 'drivers/edac/pasemi_edac.c')
-rw-r--r-- | drivers/edac/pasemi_edac.c | 49 |
1 files changed, 29 insertions, 20 deletions
diff --git a/drivers/edac/pasemi_edac.c b/drivers/edac/pasemi_edac.c index 7f71ee436744..b095a906a994 100644 --- a/drivers/edac/pasemi_edac.c +++ b/drivers/edac/pasemi_edac.c | |||
@@ -110,15 +110,16 @@ static void pasemi_edac_process_error_info(struct mem_ctl_info *mci, u32 errsta) | |||
110 | /* uncorrectable/multi-bit errors */ | 110 | /* uncorrectable/multi-bit errors */ |
111 | if (errsta & (MCDEBUG_ERRSTA_MBE_STATUS | | 111 | if (errsta & (MCDEBUG_ERRSTA_MBE_STATUS | |
112 | MCDEBUG_ERRSTA_RFL_STATUS)) { | 112 | MCDEBUG_ERRSTA_RFL_STATUS)) { |
113 | edac_mc_handle_ue(mci, mci->csrows[cs].first_page, 0, | 113 | edac_mc_handle_error(HW_EVENT_ERR_UNCORRECTED, mci, |
114 | cs, mci->ctl_name); | 114 | mci->csrows[cs].first_page, 0, 0, |
115 | cs, 0, -1, mci->ctl_name, "", NULL); | ||
115 | } | 116 | } |
116 | 117 | ||
117 | /* correctable/single-bit errors */ | 118 | /* correctable/single-bit errors */ |
118 | if (errsta & MCDEBUG_ERRSTA_SBE_STATUS) { | 119 | if (errsta & MCDEBUG_ERRSTA_SBE_STATUS) |
119 | edac_mc_handle_ce(mci, mci->csrows[cs].first_page, 0, | 120 | edac_mc_handle_error(HW_EVENT_ERR_CORRECTED, mci, |
120 | 0, cs, 0, mci->ctl_name); | 121 | mci->csrows[cs].first_page, 0, 0, |
121 | } | 122 | cs, 0, -1, mci->ctl_name, "", NULL); |
122 | } | 123 | } |
123 | 124 | ||
124 | static void pasemi_edac_check(struct mem_ctl_info *mci) | 125 | static void pasemi_edac_check(struct mem_ctl_info *mci) |
@@ -135,11 +136,13 @@ static int pasemi_edac_init_csrows(struct mem_ctl_info *mci, | |||
135 | enum edac_type edac_mode) | 136 | enum edac_type edac_mode) |
136 | { | 137 | { |
137 | struct csrow_info *csrow; | 138 | struct csrow_info *csrow; |
139 | struct dimm_info *dimm; | ||
138 | u32 rankcfg; | 140 | u32 rankcfg; |
139 | int index; | 141 | int index; |
140 | 142 | ||
141 | for (index = 0; index < mci->nr_csrows; index++) { | 143 | for (index = 0; index < mci->nr_csrows; index++) { |
142 | csrow = &mci->csrows[index]; | 144 | csrow = &mci->csrows[index]; |
145 | dimm = csrow->channels[0].dimm; | ||
143 | 146 | ||
144 | pci_read_config_dword(pdev, | 147 | pci_read_config_dword(pdev, |
145 | MCDRAM_RANKCFG + (index * 12), | 148 | MCDRAM_RANKCFG + (index * 12), |
@@ -151,20 +154,20 @@ static int pasemi_edac_init_csrows(struct mem_ctl_info *mci, | |||
151 | switch ((rankcfg & MCDRAM_RANKCFG_TYPE_SIZE_M) >> | 154 | switch ((rankcfg & MCDRAM_RANKCFG_TYPE_SIZE_M) >> |
152 | MCDRAM_RANKCFG_TYPE_SIZE_S) { | 155 | MCDRAM_RANKCFG_TYPE_SIZE_S) { |
153 | case 0: | 156 | case 0: |
154 | csrow->nr_pages = 128 << (20 - PAGE_SHIFT); | 157 | dimm->nr_pages = 128 << (20 - PAGE_SHIFT); |
155 | break; | 158 | break; |
156 | case 1: | 159 | case 1: |
157 | csrow->nr_pages = 256 << (20 - PAGE_SHIFT); | 160 | dimm->nr_pages = 256 << (20 - PAGE_SHIFT); |
158 | break; | 161 | break; |
159 | case 2: | 162 | case 2: |
160 | case 3: | 163 | case 3: |
161 | csrow->nr_pages = 512 << (20 - PAGE_SHIFT); | 164 | dimm->nr_pages = 512 << (20 - PAGE_SHIFT); |
162 | break; | 165 | break; |
163 | case 4: | 166 | case 4: |
164 | csrow->nr_pages = 1024 << (20 - PAGE_SHIFT); | 167 | dimm->nr_pages = 1024 << (20 - PAGE_SHIFT); |
165 | break; | 168 | break; |
166 | case 5: | 169 | case 5: |
167 | csrow->nr_pages = 2048 << (20 - PAGE_SHIFT); | 170 | dimm->nr_pages = 2048 << (20 - PAGE_SHIFT); |
168 | break; | 171 | break; |
169 | default: | 172 | default: |
170 | edac_mc_printk(mci, KERN_ERR, | 173 | edac_mc_printk(mci, KERN_ERR, |
@@ -174,13 +177,13 @@ static int pasemi_edac_init_csrows(struct mem_ctl_info *mci, | |||
174 | } | 177 | } |
175 | 178 | ||
176 | csrow->first_page = last_page_in_mmc; | 179 | csrow->first_page = last_page_in_mmc; |
177 | csrow->last_page = csrow->first_page + csrow->nr_pages - 1; | 180 | csrow->last_page = csrow->first_page + dimm->nr_pages - 1; |
178 | last_page_in_mmc += csrow->nr_pages; | 181 | last_page_in_mmc += dimm->nr_pages; |
179 | csrow->page_mask = 0; | 182 | csrow->page_mask = 0; |
180 | csrow->grain = PASEMI_EDAC_ERROR_GRAIN; | 183 | dimm->grain = PASEMI_EDAC_ERROR_GRAIN; |
181 | csrow->mtype = MEM_DDR; | 184 | dimm->mtype = MEM_DDR; |
182 | csrow->dtype = DEV_UNKNOWN; | 185 | dimm->dtype = DEV_UNKNOWN; |
183 | csrow->edac_mode = edac_mode; | 186 | dimm->edac_mode = edac_mode; |
184 | } | 187 | } |
185 | return 0; | 188 | return 0; |
186 | } | 189 | } |
@@ -189,6 +192,7 @@ static int __devinit pasemi_edac_probe(struct pci_dev *pdev, | |||
189 | const struct pci_device_id *ent) | 192 | const struct pci_device_id *ent) |
190 | { | 193 | { |
191 | struct mem_ctl_info *mci = NULL; | 194 | struct mem_ctl_info *mci = NULL; |
195 | struct edac_mc_layer layers[2]; | ||
192 | u32 errctl1, errcor, scrub, mcen; | 196 | u32 errctl1, errcor, scrub, mcen; |
193 | 197 | ||
194 | pci_read_config_dword(pdev, MCCFG_MCEN, &mcen); | 198 | pci_read_config_dword(pdev, MCCFG_MCEN, &mcen); |
@@ -205,9 +209,14 @@ static int __devinit pasemi_edac_probe(struct pci_dev *pdev, | |||
205 | MCDEBUG_ERRCTL1_RFL_LOG_EN; | 209 | MCDEBUG_ERRCTL1_RFL_LOG_EN; |
206 | pci_write_config_dword(pdev, MCDEBUG_ERRCTL1, errctl1); | 210 | pci_write_config_dword(pdev, MCDEBUG_ERRCTL1, errctl1); |
207 | 211 | ||
208 | mci = edac_mc_alloc(0, PASEMI_EDAC_NR_CSROWS, PASEMI_EDAC_NR_CHANS, | 212 | layers[0].type = EDAC_MC_LAYER_CHIP_SELECT; |
209 | system_mmc_id++); | 213 | layers[0].size = PASEMI_EDAC_NR_CSROWS; |
210 | 214 | layers[0].is_virt_csrow = true; | |
215 | layers[1].type = EDAC_MC_LAYER_CHANNEL; | ||
216 | layers[1].size = PASEMI_EDAC_NR_CHANS; | ||
217 | layers[1].is_virt_csrow = false; | ||
218 | mci = edac_mc_alloc(system_mmc_id++, ARRAY_SIZE(layers), layers, | ||
219 | 0); | ||
211 | if (mci == NULL) | 220 | if (mci == NULL) |
212 | return -ENOMEM; | 221 | return -ENOMEM; |
213 | 222 | ||