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Diffstat (limited to 'drivers/edac/mce_amd.h')
-rw-r--r--drivers/edac/mce_amd.h13
1 files changed, 6 insertions, 7 deletions
diff --git a/drivers/edac/mce_amd.h b/drivers/edac/mce_amd.h
index 679679951e23..51b7e3a36e37 100644
--- a/drivers/edac/mce_amd.h
+++ b/drivers/edac/mce_amd.h
@@ -14,6 +14,7 @@
14#define TLB_ERROR(x) (((x) & 0xFFF0) == 0x0010) 14#define TLB_ERROR(x) (((x) & 0xFFF0) == 0x0010)
15#define MEM_ERROR(x) (((x) & 0xFF00) == 0x0100) 15#define MEM_ERROR(x) (((x) & 0xFF00) == 0x0100)
16#define BUS_ERROR(x) (((x) & 0xF800) == 0x0800) 16#define BUS_ERROR(x) (((x) & 0xF800) == 0x0800)
17#define INT_ERROR(x) (((x) & 0xF4FF) == 0x0400)
17 18
18#define TT(x) (((x) >> 2) & 0x3) 19#define TT(x) (((x) >> 2) & 0x3)
19#define TT_MSG(x) tt_msgs[TT(x)] 20#define TT_MSG(x) tt_msgs[TT(x)]
@@ -25,6 +26,8 @@
25#define TO_MSG(x) to_msgs[TO(x)] 26#define TO_MSG(x) to_msgs[TO(x)]
26#define PP(x) (((x) >> 9) & 0x3) 27#define PP(x) (((x) >> 9) & 0x3)
27#define PP_MSG(x) pp_msgs[PP(x)] 28#define PP_MSG(x) pp_msgs[PP(x)]
29#define UU(x) (((x) >> 8) & 0x3)
30#define UU_MSG(x) uu_msgs[UU(x)]
28 31
29#define R4(x) (((x) >> 4) & 0xf) 32#define R4(x) (((x) >> 4) & 0xf)
30#define R4_MSG(x) ((R4(x) < 9) ? rrrr_msgs[R4(x)] : "Wrong R4!") 33#define R4_MSG(x) ((R4(x) < 9) ? rrrr_msgs[R4(x)] : "Wrong R4!")
@@ -32,6 +35,8 @@
32#define MCI_STATUS_DEFERRED BIT_64(44) 35#define MCI_STATUS_DEFERRED BIT_64(44)
33#define MCI_STATUS_POISON BIT_64(43) 36#define MCI_STATUS_POISON BIT_64(43)
34 37
38extern const char * const pp_msgs[];
39
35enum tt_ids { 40enum tt_ids {
36 TT_INSTR = 0, 41 TT_INSTR = 0,
37 TT_DATA, 42 TT_DATA,
@@ -65,19 +70,13 @@ enum rrrr_ids {
65 R4_SNOOP, 70 R4_SNOOP,
66}; 71};
67 72
68extern const char * const tt_msgs[];
69extern const char * const ll_msgs[];
70extern const char * const rrrr_msgs[];
71extern const char * const pp_msgs[];
72extern const char * const to_msgs[];
73extern const char * const ii_msgs[];
74
75/* 73/*
76 * per-family decoder ops 74 * per-family decoder ops
77 */ 75 */
78struct amd_decoder_ops { 76struct amd_decoder_ops {
79 bool (*mc0_mce)(u16, u8); 77 bool (*mc0_mce)(u16, u8);
80 bool (*mc1_mce)(u16, u8); 78 bool (*mc1_mce)(u16, u8);
79 bool (*mc2_mce)(u16, u8);
81}; 80};
82 81
83void amd_report_gart_errors(bool); 82void amd_report_gart_errors(bool);