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path: root/drivers/edac/i82443bxgx_edac.c
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Diffstat (limited to 'drivers/edac/i82443bxgx_edac.c')
-rw-r--r--drivers/edac/i82443bxgx_edac.c47
1 files changed, 24 insertions, 23 deletions
diff --git a/drivers/edac/i82443bxgx_edac.c b/drivers/edac/i82443bxgx_edac.c
index d190104081ca..445ed56558f1 100644
--- a/drivers/edac/i82443bxgx_edac.c
+++ b/drivers/edac/i82443bxgx_edac.c
@@ -114,8 +114,8 @@ struct i82443bxgx_edacmc_error_info {
114static struct edac_pci_ctl_info *i82443bxgx_pci; 114static struct edac_pci_ctl_info *i82443bxgx_pci;
115 115
116static void i82443bxgx_edacmc_get_error_info(struct mem_ctl_info *mci, 116static void i82443bxgx_edacmc_get_error_info(struct mem_ctl_info *mci,
117 struct i82443bxgx_edacmc_error_info 117 struct i82443bxgx_edacmc_error_info
118 *info) 118 *info)
119{ 119{
120 struct pci_dev *pdev; 120 struct pci_dev *pdev;
121 pdev = to_pci_dev(mci->dev); 121 pdev = to_pci_dev(mci->dev);
@@ -151,17 +151,18 @@ static int i82443bxgx_edacmc_process_error_info(struct mem_ctl_info *mci,
151 error_found = 1; 151 error_found = 1;
152 if (handle_errors) 152 if (handle_errors)
153 edac_mc_handle_ce(mci, page, pageoffset, 153 edac_mc_handle_ce(mci, page, pageoffset,
154 /* 440BX/GX don't make syndrome information available */ 154 /* 440BX/GX don't make syndrome information
155 0, edac_mc_find_csrow_by_page(mci, page), 0, /* channel */ 155 * available */
156 mci->ctl_name); 156 0, edac_mc_find_csrow_by_page(mci, page), 0,
157 mci->ctl_name);
157 } 158 }
158 159
159 if (info->eap & I82443BXGX_EAP_OFFSET_MBE) { 160 if (info->eap & I82443BXGX_EAP_OFFSET_MBE) {
160 error_found = 1; 161 error_found = 1;
161 if (handle_errors) 162 if (handle_errors)
162 edac_mc_handle_ue(mci, page, pageoffset, 163 edac_mc_handle_ue(mci, page, pageoffset,
163 edac_mc_find_csrow_by_page(mci, page), 164 edac_mc_find_csrow_by_page(mci, page),
164 mci->ctl_name); 165 mci->ctl_name);
165 } 166 }
166 167
167 return error_found; 168 return error_found;
@@ -177,9 +178,9 @@ static void i82443bxgx_edacmc_check(struct mem_ctl_info *mci)
177} 178}
178 179
179static void i82443bxgx_init_csrows(struct mem_ctl_info *mci, 180static void i82443bxgx_init_csrows(struct mem_ctl_info *mci,
180 struct pci_dev *pdev, 181 struct pci_dev *pdev,
181 enum edac_type edac_mode, 182 enum edac_type edac_mode,
182 enum mem_type mtype) 183 enum mem_type mtype)
183{ 184{
184 struct csrow_info *csrow; 185 struct csrow_info *csrow;
185 int index; 186 int index;
@@ -233,7 +234,8 @@ static int i82443bxgx_edacmc_probe1(struct pci_dev *pdev, int dev_idx)
233 debugf0("MC: " __FILE__ ": %s()\n", __func__); 234 debugf0("MC: " __FILE__ ": %s()\n", __func__);
234 235
235 /* Something is really hosed if PCI config space reads from 236 /* Something is really hosed if PCI config space reads from
236 the MC aren't working. */ 237 * the MC aren't working.
238 */
237 if (pci_read_config_dword(pdev, I82443BXGX_NBXCFG, &nbxcfg)) 239 if (pci_read_config_dword(pdev, I82443BXGX_NBXCFG, &nbxcfg))
238 return -EIO; 240 return -EIO;
239 241
@@ -258,8 +260,8 @@ static int i82443bxgx_edacmc_probe1(struct pci_dev *pdev, int dev_idx)
258 mtype = MEM_RDR; 260 mtype = MEM_RDR;
259 break; 261 break;
260 default: 262 default:
261 debugf0 263 debugf0("Unknown/reserved DRAM type value "
262 ("Unknown/reserved DRAM type value in DRAMC register!\n"); 264 "in DRAMC register!\n");
263 mtype = -MEM_UNKNOWN; 265 mtype = -MEM_UNKNOWN;
264 } 266 }
265 267
@@ -271,10 +273,10 @@ static int i82443bxgx_edacmc_probe1(struct pci_dev *pdev, int dev_idx)
271 mci->scrub_cap = SCRUB_FLAG_HW_SRC; 273 mci->scrub_cap = SCRUB_FLAG_HW_SRC;
272 pci_read_config_dword(pdev, I82443BXGX_NBXCFG, &nbxcfg); 274 pci_read_config_dword(pdev, I82443BXGX_NBXCFG, &nbxcfg);
273 ecc_mode = ((nbxcfg >> I82443BXGX_NBXCFG_OFFSET_DRAM_INTEGRITY) & 275 ecc_mode = ((nbxcfg >> I82443BXGX_NBXCFG_OFFSET_DRAM_INTEGRITY) &
274 (BIT(0) | BIT(1))); 276 (BIT(0) | BIT(1)));
275 277
276 mci->scrub_mode = (ecc_mode == I82443BXGX_NBXCFG_INTEGRITY_SCRUB) 278 mci->scrub_mode = (ecc_mode == I82443BXGX_NBXCFG_INTEGRITY_SCRUB)
277 ? SCRUB_HW_SRC : SCRUB_NONE; 279 ? SCRUB_HW_SRC : SCRUB_NONE;
278 280
279 switch (ecc_mode) { 281 switch (ecc_mode) {
280 case I82443BXGX_NBXCFG_INTEGRITY_NONE: 282 case I82443BXGX_NBXCFG_INTEGRITY_NONE:
@@ -288,9 +290,8 @@ static int i82443bxgx_edacmc_probe1(struct pci_dev *pdev, int dev_idx)
288 edac_mode = EDAC_SECDED; 290 edac_mode = EDAC_SECDED;
289 break; 291 break;
290 default: 292 default:
291 debugf0 293 debugf0("%s(): Unknown/reserved ECC state "
292 ("%s(): Unknown/reserved ECC state in NBXCFG register!\n", 294 "in NBXCFG register!\n", __func__);
293 __func__);
294 edac_mode = EDAC_UNKNOWN; 295 edac_mode = EDAC_UNKNOWN;
295 break; 296 break;
296 } 297 }
@@ -301,10 +302,10 @@ static int i82443bxgx_edacmc_probe1(struct pci_dev *pdev, int dev_idx)
301 * here, or we get "phantom" errors occuring at module-load 302 * here, or we get "phantom" errors occuring at module-load
302 * time. */ 303 * time. */
303 pci_write_bits32(pdev, I82443BXGX_EAP, 304 pci_write_bits32(pdev, I82443BXGX_EAP,
304 (I82443BXGX_EAP_OFFSET_SBE | 305 (I82443BXGX_EAP_OFFSET_SBE |
305 I82443BXGX_EAP_OFFSET_MBE), 306 I82443BXGX_EAP_OFFSET_MBE),
306 (I82443BXGX_EAP_OFFSET_SBE | 307 (I82443BXGX_EAP_OFFSET_SBE |
307 I82443BXGX_EAP_OFFSET_MBE)); 308 I82443BXGX_EAP_OFFSET_MBE));
308 309
309 mci->mod_name = EDAC_MOD_STR; 310 mci->mod_name = EDAC_MOD_STR;
310 mci->mod_ver = I82443_REVISION; 311 mci->mod_ver = I82443_REVISION;
@@ -332,7 +333,7 @@ static int i82443bxgx_edacmc_probe1(struct pci_dev *pdev, int dev_idx)
332 debugf3("MC: " __FILE__ ": %s(): success\n", __func__); 333 debugf3("MC: " __FILE__ ": %s(): success\n", __func__);
333 return 0; 334 return 0;
334 335
335 fail: 336fail:
336 edac_mc_free(mci); 337 edac_mc_free(mci);
337 return -ENODEV; 338 return -ENODEV;
338} 339}