1 files changed, 97 insertions, 104 deletions

diff --git a/drivers/edac/i5400_edac.c b/drivers/edac/i5400_edac.c
index 6640c29e1885..277246998b80 100644
--- a/drivers/edac/i5400_edac.c
+++ b/drivers/edac/i5400_edac.c
@@ -300,24 +300,6 @@ static inline int extract_fbdchan_indx(u32 x)
         return (x>>28) & 0x3;
 }
 
-#ifdef CONFIG_EDAC_DEBUG
-/* MTR NUMROW */
-static const char *numrow_toString[] = {
-        "8,192 - 13 rows",
-        "16,384 - 14 rows",
-        "32,768 - 15 rows",
-        "65,536 - 16 rows"
-};
-
-/* MTR NUMCOL */
-static const char *numcol_toString[] = {
-        "1,024 - 10 columns",
-        "2,048 - 11 columns",
-        "4,096 - 12 columns",
-        "reserved"
-};
-#endif
-
 /* Device name and register DID (Device ID) */
 struct i5400_dev_info {
         const char *ctl_name;   /* name for this device */
@@ -345,7 +327,13 @@ struct i5400_pvt {
         struct pci_dev *branch_1;               /* 22.0 */
 
         u16 tolm;                               /* top of low memory */
-        u64 ambase;                             /* AMB BAR */
+        union {
+                u64 ambase;                             /* AMB BAR */
+                struct {
+                        u32 ambase_bottom;
+                        u32 ambase_top;
+                } u __packed;
+        };
 
         u16 mir0, mir1;
 
@@ -560,10 +548,9 @@ static void i5400_proccess_non_recoverable_info(struct mem_ctl_info *mci,
         ras = nrec_ras(info);
         cas = nrec_cas(info);
 
-        debugf0("\t\tDIMM= %d  Channels= %d,%d  (Branch= %d "
-                "DRAM Bank= %d Buffer ID = %d rdwr= %s ras= %d cas= %d)\n",
-                rank, channel, channel + 1, branch >> 1, bank,
-                buf_id, rdwr_str(rdwr), ras, cas);
+        edac_dbg(0, "\t\tDIMM= %d  Channels= %d,%d  (Branch= %d DRAM Bank= %d Buffer ID = %d rdwr= %s ras= %d cas= %d)\n",
+                 rank, channel, channel + 1, branch >> 1, bank,
+                 buf_id, rdwr_str(rdwr), ras, cas);
 
         /* Only 1 bit will be on */
         errnum = find_first_bit(&allErrors, ARRAY_SIZE(error_name));
@@ -573,10 +560,10 @@ static void i5400_proccess_non_recoverable_info(struct mem_ctl_info *mci,
                  "Bank=%d Buffer ID = %d RAS=%d CAS=%d Err=0x%lx (%s)",
                  bank, buf_id, ras, cas, allErrors, error_name[errnum]);
 
-        edac_mc_handle_error(tp_event, mci, 0, 0, 0,
+        edac_mc_handle_error(tp_event, mci, 1, 0, 0, 0,
                              branch >> 1, -1, rank,
                              rdwr ? "Write error" : "Read error",
-                             msg, NULL);
+                             msg);
 }
 
 /*
@@ -613,7 +600,7 @@ static void i5400_process_nonfatal_error_info(struct mem_ctl_info *mci,
 
         /* Correctable errors */
         if (allErrors & ERROR_NF_CORRECTABLE) {
-                debugf0("\tCorrected bits= 0x%lx\n", allErrors);
+                edac_dbg(0, "\tCorrected bits= 0x%lx\n", allErrors);
 
                 branch = extract_fbdchan_indx(info->ferr_nf_fbd);
 
@@ -634,10 +621,9 @@ static void i5400_process_nonfatal_error_info(struct mem_ctl_info *mci,
                 /* Only 1 bit will be on */
                 errnum = find_first_bit(&allErrors, ARRAY_SIZE(error_name));
 
-                debugf0("\t\tDIMM= %d Channel= %d  (Branch %d "
-                        "DRAM Bank= %d rdwr= %s ras= %d cas= %d)\n",
-                        rank, channel, branch >> 1, bank,
-                        rdwr_str(rdwr), ras, cas);
+                edac_dbg(0, "\t\tDIMM= %d Channel= %d  (Branch %d DRAM Bank= %d rdwr= %s ras= %d cas= %d)\n",
+                         rank, channel, branch >> 1, bank,
+                         rdwr_str(rdwr), ras, cas);
 
                 /* Form out message */
                 snprintf(msg, sizeof(msg),
@@ -646,10 +632,10 @@ static void i5400_process_nonfatal_error_info(struct mem_ctl_info *mci,
                          branch >> 1, bank, rdwr_str(rdwr), ras, cas,
                          allErrors, error_name[errnum]);
 
-                edac_mc_handle_error(HW_EVENT_ERR_CORRECTED, mci, 0, 0, 0,
+                edac_mc_handle_error(HW_EVENT_ERR_CORRECTED, mci, 1, 0, 0, 0,
                                      branch >> 1, channel % 2, rank,
                                      rdwr ? "Write error" : "Read error",
-                                     msg, NULL);
+                                     msg);
 
                 return;
         }
@@ -700,7 +686,7 @@ static void i5400_clear_error(struct mem_ctl_info *mci)
 static void i5400_check_error(struct mem_ctl_info *mci)
 {
         struct i5400_error_info info;
-        debugf4("MC%d: %s: %s()\n", mci->mc_idx, __FILE__, __func__);
+        edac_dbg(4, "MC%d\n", mci->mc_idx);
         i5400_get_error_info(mci, &info);
         i5400_process_error_info(mci, &info);
 }
@@ -786,15 +772,16 @@ static int i5400_get_devices(struct mem_ctl_info *mci, int dev_idx)
         }
         pvt->fsb_error_regs = pdev;
 
-        debugf1("System Address, processor bus- PCI Bus ID: %s  %x:%x\n",
-                pci_name(pvt->system_address),
-                pvt->system_address->vendor, pvt->system_address->device);
-        debugf1("Branchmap, control and errors - PCI Bus ID: %s  %x:%x\n",
-                pci_name(pvt->branchmap_werrors),
-                pvt->branchmap_werrors->vendor, pvt->branchmap_werrors->device);
-        debugf1("FSB Error Regs - PCI Bus ID: %s  %x:%x\n",
-                pci_name(pvt->fsb_error_regs),
-                pvt->fsb_error_regs->vendor, pvt->fsb_error_regs->device);
+        edac_dbg(1, "System Address, processor bus- PCI Bus ID: %s  %x:%x\n",
+                 pci_name(pvt->system_address),
+                 pvt->system_address->vendor, pvt->system_address->device);
+        edac_dbg(1, "Branchmap, control and errors - PCI Bus ID: %s  %x:%x\n",
+                 pci_name(pvt->branchmap_werrors),
+                 pvt->branchmap_werrors->vendor,
+                 pvt->branchmap_werrors->device);
+        edac_dbg(1, "FSB Error Regs - PCI Bus ID: %s  %x:%x\n",
+                 pci_name(pvt->fsb_error_regs),
+                 pvt->fsb_error_regs->vendor, pvt->fsb_error_regs->device);
 
         pvt->branch_0 = pci_get_device(PCI_VENDOR_ID_INTEL,
                                        PCI_DEVICE_ID_INTEL_5400_FBD0, NULL);
@@ -882,8 +869,8 @@ static int determine_mtr(struct i5400_pvt *pvt, int dimm, int channel)
         n = dimm;
 
         if (n >= DIMMS_PER_CHANNEL) {
-                debugf0("ERROR: trying to access an invalid dimm: %d\n",
-                        dimm);
+                edac_dbg(0, "ERROR: trying to access an invalid dimm: %d\n",
+                         dimm);
                 return 0;
         }
 
@@ -903,20 +890,29 @@ static void decode_mtr(int slot_row, u16 mtr)
 
         ans = MTR_DIMMS_PRESENT(mtr);
 
-        debugf2("\tMTR%d=0x%x:  DIMMs are %s\n", slot_row, mtr,
-                ans ? "Present" : "NOT Present");
+        edac_dbg(2, "\tMTR%d=0x%x:  DIMMs are %sPresent\n",
+                 slot_row, mtr, ans ? "" : "NOT ");
         if (!ans)
                 return;
 
-        debugf2("\t\tWIDTH: x%d\n", MTR_DRAM_WIDTH(mtr));
-
-        debugf2("\t\tELECTRICAL THROTTLING is %s\n",
-                MTR_DIMMS_ETHROTTLE(mtr) ? "enabled" : "disabled");
-
-        debugf2("\t\tNUMBANK: %d bank(s)\n", MTR_DRAM_BANKS(mtr));
-        debugf2("\t\tNUMRANK: %s\n", MTR_DIMM_RANK(mtr) ? "double" : "single");
-        debugf2("\t\tNUMROW: %s\n", numrow_toString[MTR_DIMM_ROWS(mtr)]);
-        debugf2("\t\tNUMCOL: %s\n", numcol_toString[MTR_DIMM_COLS(mtr)]);
+        edac_dbg(2, "\t\tWIDTH: x%d\n", MTR_DRAM_WIDTH(mtr));
+
+        edac_dbg(2, "\t\tELECTRICAL THROTTLING is %s\n",
+                 MTR_DIMMS_ETHROTTLE(mtr) ? "enabled" : "disabled");
+
+        edac_dbg(2, "\t\tNUMBANK: %d bank(s)\n", MTR_DRAM_BANKS(mtr));
+        edac_dbg(2, "\t\tNUMRANK: %s\n",
+                 MTR_DIMM_RANK(mtr) ? "double" : "single");
+        edac_dbg(2, "\t\tNUMROW: %s\n",
+                 MTR_DIMM_ROWS(mtr) == 0 ? "8,192 - 13 rows" :
+                 MTR_DIMM_ROWS(mtr) == 1 ? "16,384 - 14 rows" :
+                 MTR_DIMM_ROWS(mtr) == 2 ? "32,768 - 15 rows" :
+                 "65,536 - 16 rows");
+        edac_dbg(2, "\t\tNUMCOL: %s\n",
+                 MTR_DIMM_COLS(mtr) == 0 ? "1,024 - 10 columns" :
+                 MTR_DIMM_COLS(mtr) == 1 ? "2,048 - 11 columns" :
+                 MTR_DIMM_COLS(mtr) == 2 ? "4,096 - 12 columns" :
+                 "reserved");
 }
 
 static void handle_channel(struct i5400_pvt *pvt, int dimm, int channel,
@@ -989,7 +985,7 @@ static void calculate_dimm_size(struct i5400_pvt *pvt)
                                         "-------------------------------");
                         p += n;
                         space -= n;
-                        debugf2("%s\n", mem_buffer);
+                        edac_dbg(2, "%s\n", mem_buffer);
                         p = mem_buffer;
                         space = PAGE_SIZE;
                 }
@@ -1004,7 +1000,7 @@ static void calculate_dimm_size(struct i5400_pvt *pvt)
                         p += n;
                         space -= n;
                 }
-                debugf2("%s\n", mem_buffer);
+                edac_dbg(2, "%s\n", mem_buffer);
                 p = mem_buffer;
                 space = PAGE_SIZE;
         }
@@ -1014,7 +1010,7 @@ static void calculate_dimm_size(struct i5400_pvt *pvt)
                         "-------------------------------");
         p += n;
         space -= n;
-        debugf2("%s\n", mem_buffer);
+        edac_dbg(2, "%s\n", mem_buffer);
         p = mem_buffer;
         space = PAGE_SIZE;
 
@@ -1029,7 +1025,7 @@ static void calculate_dimm_size(struct i5400_pvt *pvt)
         }
 
         space -= n;
-        debugf2("%s\n", mem_buffer);
+        edac_dbg(2, "%s\n", mem_buffer);
         p = mem_buffer;
         space = PAGE_SIZE;
 
@@ -1042,7 +1038,7 @@ static void calculate_dimm_size(struct i5400_pvt *pvt)
         }
 
         /* output the last message and free buffer */
-        debugf2("%s\n", mem_buffer);
+        edac_dbg(2, "%s\n", mem_buffer);
         kfree(mem_buffer);
 }
 
@@ -1065,25 +1061,25 @@ static void i5400_get_mc_regs(struct mem_ctl_info *mci)
         pvt = mci->pvt_info;
 
         pci_read_config_dword(pvt->system_address, AMBASE,
-                        (u32 *) &pvt->ambase);
+                        &pvt->u.ambase_bottom);
         pci_read_config_dword(pvt->system_address, AMBASE + sizeof(u32),
-                        ((u32 *) &pvt->ambase) + sizeof(u32));
+                        &pvt->u.ambase_top);
 
         maxdimmperch = pvt->maxdimmperch;
         maxch = pvt->maxch;
 
-        debugf2("AMBASE= 0x%lx  MAXCH= %d  MAX-DIMM-Per-CH= %d\n",
-                (long unsigned int)pvt->ambase, pvt->maxch, pvt->maxdimmperch);
+        edac_dbg(2, "AMBASE= 0x%lx  MAXCH= %d  MAX-DIMM-Per-CH= %d\n",
+                 (long unsigned int)pvt->ambase, pvt->maxch, pvt->maxdimmperch);
 
         /* Get the Branch Map regs */
         pci_read_config_word(pvt->branchmap_werrors, TOLM, &pvt->tolm);
         pvt->tolm >>= 12;
-        debugf2("\nTOLM (number of 256M regions) =%u (0x%x)\n", pvt->tolm,
-                pvt->tolm);
+        edac_dbg(2, "\nTOLM (number of 256M regions) =%u (0x%x)\n",
+                 pvt->tolm, pvt->tolm);
 
         actual_tolm = (u32) ((1000l * pvt->tolm) >> (30 - 28));
-        debugf2("Actual TOLM byte addr=%u.%03u GB (0x%x)\n",
-                actual_tolm/1000, actual_tolm % 1000, pvt->tolm << 28);
+        edac_dbg(2, "Actual TOLM byte addr=%u.%03u GB (0x%x)\n",
+                 actual_tolm/1000, actual_tolm % 1000, pvt->tolm << 28);
 
         pci_read_config_word(pvt->branchmap_werrors, MIR0, &pvt->mir0);
         pci_read_config_word(pvt->branchmap_werrors, MIR1, &pvt->mir1);
@@ -1092,11 +1088,13 @@ static void i5400_get_mc_regs(struct mem_ctl_info *mci)
         limit = (pvt->mir0 >> 4) & 0x0fff;
         way0 = pvt->mir0 & 0x1;
         way1 = pvt->mir0 & 0x2;
-        debugf2("MIR0: limit= 0x%x  WAY1= %u  WAY0= %x\n", limit, way1, way0);
+        edac_dbg(2, "MIR0: limit= 0x%x  WAY1= %u  WAY0= %x\n",
+                 limit, way1, way0);
         limit = (pvt->mir1 >> 4) & 0xfff;
         way0 = pvt->mir1 & 0x1;
         way1 = pvt->mir1 & 0x2;
-        debugf2("MIR1: limit= 0x%x  WAY1= %u  WAY0= %x\n", limit, way1, way0);
+        edac_dbg(2, "MIR1: limit= 0x%x  WAY1= %u  WAY0= %x\n",
+                 limit, way1, way0);
 
         /* Get the set of MTR[0-3] regs by each branch */
         for (slot_row = 0; slot_row < DIMMS_PER_CHANNEL; slot_row++) {
@@ -1106,8 +1104,8 @@ static void i5400_get_mc_regs(struct mem_ctl_info *mci)
                 pci_read_config_word(pvt->branch_0, where,
                                 &pvt->b0_mtr[slot_row]);
 
-                debugf2("MTR%d where=0x%x B0 value=0x%x\n", slot_row, where,
-                        pvt->b0_mtr[slot_row]);
+                edac_dbg(2, "MTR%d where=0x%x B0 value=0x%x\n",
+                         slot_row, where, pvt->b0_mtr[slot_row]);
 
                 if (pvt->maxch < CHANNELS_PER_BRANCH) {
                         pvt->b1_mtr[slot_row] = 0;
@@ -1117,22 +1115,22 @@ static void i5400_get_mc_regs(struct mem_ctl_info *mci)
                 /* Branch 1 set of MTR registers */
                 pci_read_config_word(pvt->branch_1, where,
                                 &pvt->b1_mtr[slot_row]);
-                debugf2("MTR%d where=0x%x B1 value=0x%x\n", slot_row, where,
-                        pvt->b1_mtr[slot_row]);
+                edac_dbg(2, "MTR%d where=0x%x B1 value=0x%x\n",
+                         slot_row, where, pvt->b1_mtr[slot_row]);
         }
 
         /* Read and dump branch 0's MTRs */
-        debugf2("\nMemory Technology Registers:\n");
-        debugf2("   Branch 0:\n");
+        edac_dbg(2, "Memory Technology Registers:\n");
+        edac_dbg(2, "   Branch 0:\n");
         for (slot_row = 0; slot_row < DIMMS_PER_CHANNEL; slot_row++)
                 decode_mtr(slot_row, pvt->b0_mtr[slot_row]);
 
         pci_read_config_word(pvt->branch_0, AMBPRESENT_0,
                         &pvt->b0_ambpresent0);
-        debugf2("\t\tAMB-Branch 0-present0 0x%x:\n", pvt->b0_ambpresent0);
+        edac_dbg(2, "\t\tAMB-Branch 0-present0 0x%x:\n", pvt->b0_ambpresent0);
         pci_read_config_word(pvt->branch_0, AMBPRESENT_1,
                         &pvt->b0_ambpresent1);
-        debugf2("\t\tAMB-Branch 0-present1 0x%x:\n", pvt->b0_ambpresent1);
+        edac_dbg(2, "\t\tAMB-Branch 0-present1 0x%x:\n", pvt->b0_ambpresent1);
 
         /* Only if we have 2 branchs (4 channels) */
         if (pvt->maxch < CHANNELS_PER_BRANCH) {
@@ -1140,18 +1138,18 @@ static void i5400_get_mc_regs(struct mem_ctl_info *mci)
                 pvt->b1_ambpresent1 = 0;
         } else {
                 /* Read and dump  branch 1's MTRs */
-                debugf2("   Branch 1:\n");
+                edac_dbg(2, "   Branch 1:\n");
                 for (slot_row = 0; slot_row < DIMMS_PER_CHANNEL; slot_row++)
                         decode_mtr(slot_row, pvt->b1_mtr[slot_row]);
 
                 pci_read_config_word(pvt->branch_1, AMBPRESENT_0,
                                 &pvt->b1_ambpresent0);
-                debugf2("\t\tAMB-Branch 1-present0 0x%x:\n",
-                        pvt->b1_ambpresent0);
+                edac_dbg(2, "\t\tAMB-Branch 1-present0 0x%x:\n",
+                         pvt->b1_ambpresent0);
                 pci_read_config_word(pvt->branch_1, AMBPRESENT_1,
                                 &pvt->b1_ambpresent1);
-                debugf2("\t\tAMB-Branch 1-present1 0x%x:\n",
-                        pvt->b1_ambpresent1);
+                edac_dbg(2, "\t\tAMB-Branch 1-present1 0x%x:\n",
+                         pvt->b1_ambpresent1);
         }
 
         /* Go and determine the size of each DIMM and place in an
@@ -1203,10 +1201,9 @@ static int i5400_init_dimms(struct mem_ctl_info *mci)
 
                         size_mb =  pvt->dimm_info[slot][channel].megabytes;
 
-                        debugf2("%s: dimm%zd (branch %d channel %d slot %d): %d.%03d GB\n",
-                                __func__, dimm - mci->dimms,
-                                channel / 2, channel % 2, slot,
-                                size_mb / 1000, size_mb % 1000);
+                        edac_dbg(2, "dimm (branch %d channel %d slot %d): %d.%03d GB\n",
+                                 channel / 2, channel % 2, slot,
+                                 size_mb / 1000, size_mb % 1000);
 
                         dimm->nr_pages = size_mb << 8;
                         dimm->grain = 8;
@@ -1227,7 +1224,7 @@ static int i5400_init_dimms(struct mem_ctl_info *mci)
          * With such single-DIMM mode, the SDCC algorithm degrades to SECDEC+.
          */
         if (ndimms == 1)
-                mci->dimms[0].edac_mode = EDAC_SECDED;
+                mci->dimms[0]->edac_mode = EDAC_SECDED;
 
         return (ndimms == 0);
 }
@@ -1270,10 +1267,9 @@ static int i5400_probe1(struct pci_dev *pdev, int dev_idx)
         if (dev_idx >= ARRAY_SIZE(i5400_devs))
                 return -EINVAL;
 
-        debugf0("MC: %s: %s(), pdev bus %u dev=0x%x fn=0x%x\n",
-                __FILE__, __func__,
-                pdev->bus->number,
-                PCI_SLOT(pdev->devfn), PCI_FUNC(pdev->devfn));
+        edac_dbg(0, "MC: pdev bus %u dev=0x%x fn=0x%x\n",
+                 pdev->bus->number,
+                 PCI_SLOT(pdev->devfn), PCI_FUNC(pdev->devfn));
 
         /* We only are looking for func 0 of the set */
         if (PCI_FUNC(pdev->devfn) != 0)
@@ -1297,9 +1293,9 @@ static int i5400_probe1(struct pci_dev *pdev, int dev_idx)
         if (mci == NULL)
                 return -ENOMEM;
 
-        debugf0("MC: %s: %s(): mci = %p\n", __FILE__, __func__, mci);
+        edac_dbg(0, "MC: mci = %p\n", mci);
 
-        mci->dev = &pdev->dev;  /* record ptr  to the generic device */
+        mci->pdev = &pdev->dev; /* record ptr  to the generic device */
 
         pvt = mci->pvt_info;
         pvt->system_address = pdev;     /* Record this device in our private */
@@ -1329,19 +1325,16 @@ static int i5400_probe1(struct pci_dev *pdev, int dev_idx)
         /* initialize the MC control structure 'dimms' table
          * with the mapping and control information */
         if (i5400_init_dimms(mci)) {
-                debugf0("MC: Setting mci->edac_cap to EDAC_FLAG_NONE\n"
-                        "    because i5400_init_dimms() returned nonzero "
-                        "value\n");
+                edac_dbg(0, "MC: Setting mci->edac_cap to EDAC_FLAG_NONE because i5400_init_dimms() returned nonzero value\n");
                 mci->edac_cap = EDAC_FLAG_NONE; /* no dimms found */
         } else {
-                debugf1("MC: Enable error reporting now\n");
+                edac_dbg(1, "MC: Enable error reporting now\n");
                 i5400_enable_error_reporting(mci);
         }
 
         /* add this new MC control structure to EDAC's list of MCs */
         if (edac_mc_add_mc(mci)) {
-                debugf0("MC: %s: %s(): failed edac_mc_add_mc()\n",
-                        __FILE__, __func__);
+                edac_dbg(0, "MC: failed edac_mc_add_mc()\n");
                 /* FIXME: perhaps some code should go here that disables error
                  * reporting if we just enabled it
                  */
@@ -1385,7 +1378,7 @@ static int __devinit i5400_init_one(struct pci_dev *pdev,
 {
         int rc;
 
-        debugf0("MC: %s: %s()\n", __FILE__, __func__);
+        edac_dbg(0, "MC:\n");
 
         /* wake up device */
         rc = pci_enable_device(pdev);
@@ -1404,7 +1397,7 @@ static void __devexit i5400_remove_one(struct pci_dev *pdev)
 {
         struct mem_ctl_info *mci;
 
-        debugf0("%s: %s()\n", __FILE__, __func__);
+        edac_dbg(0, "\n");
 
         if (i5400_pci)
                 edac_pci_release_generic_ctl(i5400_pci);
@@ -1450,7 +1443,7 @@ static int __init i5400_init(void)
 {
         int pci_rc;
 
-        debugf2("MC: %s: %s()\n", __FILE__, __func__);
+        edac_dbg(2, "MC:\n");
 
         /* Ensure that the OPSTATE is set correctly for POLL or NMI */
         opstate_init();
@@ -1466,7 +1459,7 @@ static int __init i5400_init(void)
  */
 static void __exit i5400_exit(void)
 {
-        debugf2("MC: %s: %s()\n", __FILE__, __func__);
+        edac_dbg(2, "MC:\n");
         pci_unregister_driver(&i5400_driver);
 }