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path: root/drivers/edac/i3200_edac.c
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Diffstat (limited to 'drivers/edac/i3200_edac.c')
-rw-r--r--drivers/edac/i3200_edac.c56
1 files changed, 32 insertions, 24 deletions
diff --git a/drivers/edac/i3200_edac.c b/drivers/edac/i3200_edac.c
index 046808c6357d..bbe43ef71823 100644
--- a/drivers/edac/i3200_edac.c
+++ b/drivers/edac/i3200_edac.c
@@ -23,6 +23,7 @@
23 23
24#define PCI_DEVICE_ID_INTEL_3200_HB 0x29f0 24#define PCI_DEVICE_ID_INTEL_3200_HB 0x29f0
25 25
26#define I3200_DIMMS 4
26#define I3200_RANKS 8 27#define I3200_RANKS 8
27#define I3200_RANKS_PER_CHANNEL 4 28#define I3200_RANKS_PER_CHANNEL 4
28#define I3200_CHANNELS 2 29#define I3200_CHANNELS 2
@@ -217,21 +218,25 @@ static void i3200_process_error_info(struct mem_ctl_info *mci,
217 return; 218 return;
218 219
219 if ((info->errsts ^ info->errsts2) & I3200_ERRSTS_BITS) { 220 if ((info->errsts ^ info->errsts2) & I3200_ERRSTS_BITS) {
220 edac_mc_handle_ce_no_info(mci, "UE overwrote CE"); 221 edac_mc_handle_error(HW_EVENT_ERR_UNCORRECTED, mci, 0, 0, 0,
222 -1, -1, -1, "UE overwrote CE", "", NULL);
221 info->errsts = info->errsts2; 223 info->errsts = info->errsts2;
222 } 224 }
223 225
224 for (channel = 0; channel < nr_channels; channel++) { 226 for (channel = 0; channel < nr_channels; channel++) {
225 log = info->eccerrlog[channel]; 227 log = info->eccerrlog[channel];
226 if (log & I3200_ECCERRLOG_UE) { 228 if (log & I3200_ECCERRLOG_UE) {
227 edac_mc_handle_ue(mci, 0, 0, 229 edac_mc_handle_error(HW_EVENT_ERR_UNCORRECTED, mci,
228 eccerrlog_row(channel, log), 230 0, 0, 0,
229 "i3200 UE"); 231 eccerrlog_row(channel, log),
232 -1, -1,
233 "i3000 UE", "", NULL);
230 } else if (log & I3200_ECCERRLOG_CE) { 234 } else if (log & I3200_ECCERRLOG_CE) {
231 edac_mc_handle_ce(mci, 0, 0, 235 edac_mc_handle_error(HW_EVENT_ERR_UNCORRECTED, mci,
232 eccerrlog_syndrome(log), 236 0, 0, eccerrlog_syndrome(log),
233 eccerrlog_row(channel, log), 0, 237 eccerrlog_row(channel, log),
234 "i3200 CE"); 238 -1, -1,
239 "i3000 UE", "", NULL);
235 } 240 }
236 } 241 }
237} 242}
@@ -319,9 +324,9 @@ static unsigned long drb_to_nr_pages(
319static int i3200_probe1(struct pci_dev *pdev, int dev_idx) 324static int i3200_probe1(struct pci_dev *pdev, int dev_idx)
320{ 325{
321 int rc; 326 int rc;
322 int i; 327 int i, j;
323 struct mem_ctl_info *mci = NULL; 328 struct mem_ctl_info *mci = NULL;
324 unsigned long last_page; 329 struct edac_mc_layer layers[2];
325 u16 drbs[I3200_CHANNELS][I3200_RANKS_PER_CHANNEL]; 330 u16 drbs[I3200_CHANNELS][I3200_RANKS_PER_CHANNEL];
326 bool stacked; 331 bool stacked;
327 void __iomem *window; 332 void __iomem *window;
@@ -336,8 +341,14 @@ static int i3200_probe1(struct pci_dev *pdev, int dev_idx)
336 i3200_get_drbs(window, drbs); 341 i3200_get_drbs(window, drbs);
337 nr_channels = how_many_channels(pdev); 342 nr_channels = how_many_channels(pdev);
338 343
339 mci = edac_mc_alloc(sizeof(struct i3200_priv), I3200_RANKS, 344 layers[0].type = EDAC_MC_LAYER_CHIP_SELECT;
340 nr_channels, 0); 345 layers[0].size = I3200_DIMMS;
346 layers[0].is_virt_csrow = true;
347 layers[1].type = EDAC_MC_LAYER_CHANNEL;
348 layers[1].size = nr_channels;
349 layers[1].is_virt_csrow = false;
350 mci = edac_mc_alloc(0, ARRAY_SIZE(layers), layers,
351 sizeof(struct i3200_priv));
341 if (!mci) 352 if (!mci)
342 return -ENOMEM; 353 return -ENOMEM;
343 354
@@ -366,7 +377,6 @@ static int i3200_probe1(struct pci_dev *pdev, int dev_idx)
366 * cumulative; the last one will contain the total memory 377 * cumulative; the last one will contain the total memory
367 * contained in all ranks. 378 * contained in all ranks.
368 */ 379 */
369 last_page = -1UL;
370 for (i = 0; i < mci->nr_csrows; i++) { 380 for (i = 0; i < mci->nr_csrows; i++) {
371 unsigned long nr_pages; 381 unsigned long nr_pages;
372 struct csrow_info *csrow = &mci->csrows[i]; 382 struct csrow_info *csrow = &mci->csrows[i];
@@ -375,20 +385,18 @@ static int i3200_probe1(struct pci_dev *pdev, int dev_idx)
375 i / I3200_RANKS_PER_CHANNEL, 385 i / I3200_RANKS_PER_CHANNEL,
376 i % I3200_RANKS_PER_CHANNEL); 386 i % I3200_RANKS_PER_CHANNEL);
377 387
378 if (nr_pages == 0) { 388 if (nr_pages == 0)
379 csrow->mtype = MEM_EMPTY;
380 continue; 389 continue;
381 }
382 390
383 csrow->first_page = last_page + 1; 391 for (j = 0; j < nr_channels; j++) {
384 last_page += nr_pages; 392 struct dimm_info *dimm = csrow->channels[j].dimm;
385 csrow->last_page = last_page;
386 csrow->nr_pages = nr_pages;
387 393
388 csrow->grain = nr_pages << PAGE_SHIFT; 394 dimm->nr_pages = nr_pages / nr_channels;
389 csrow->mtype = MEM_DDR2; 395 dimm->grain = nr_pages << PAGE_SHIFT;
390 csrow->dtype = DEV_UNKNOWN; 396 dimm->mtype = MEM_DDR2;
391 csrow->edac_mode = EDAC_UNKNOWN; 397 dimm->dtype = DEV_UNKNOWN;
398 dimm->edac_mode = EDAC_UNKNOWN;
399 }
392 } 400 }
393 401
394 i3200_clear_error_info(mci); 402 i3200_clear_error_info(mci);