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path: root/drivers/edac/e7xxx_edac.c
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Diffstat (limited to 'drivers/edac/e7xxx_edac.c')
-rw-r--r--drivers/edac/e7xxx_edac.c228
1 files changed, 113 insertions, 115 deletions
diff --git a/drivers/edac/e7xxx_edac.c b/drivers/edac/e7xxx_edac.c
index d5e320dfc66f..a9518d3e4be4 100644
--- a/drivers/edac/e7xxx_edac.c
+++ b/drivers/edac/e7xxx_edac.c
@@ -11,9 +11,9 @@
11 * http://www.anime.net/~goemon/linux-ecc/ 11 * http://www.anime.net/~goemon/linux-ecc/
12 * 12 *
13 * Contributors: 13 * Contributors:
14 * Eric Biederman (Linux Networx) 14 * Eric Biederman (Linux Networx)
15 * Tom Zimmerman (Linux Networx) 15 * Tom Zimmerman (Linux Networx)
16 * Jim Garlick (Lawrence Livermore National Labs) 16 * Jim Garlick (Lawrence Livermore National Labs)
17 * Dave Peterson (Lawrence Livermore National Labs) 17 * Dave Peterson (Lawrence Livermore National Labs)
18 * That One Guy (Some other place) 18 * That One Guy (Some other place)
19 * Wang Zhenyu (intel.com) 19 * Wang Zhenyu (intel.com)
@@ -22,7 +22,6 @@
22 * 22 *
23 */ 23 */
24 24
25
26#include <linux/config.h> 25#include <linux/config.h>
27#include <linux/module.h> 26#include <linux/module.h>
28#include <linux/init.h> 27#include <linux/init.h>
@@ -31,6 +30,11 @@
31#include <linux/slab.h> 30#include <linux/slab.h>
32#include "edac_mc.h" 31#include "edac_mc.h"
33 32
33#define e7xxx_printk(level, fmt, arg...) \
34 edac_printk(level, "e7xxx", fmt, ##arg)
35
36#define e7xxx_mc_printk(mci, level, fmt, arg...) \
37 edac_mc_chipset_printk(mci, level, "e7xxx", fmt, ##arg)
34 38
35#ifndef PCI_DEVICE_ID_INTEL_7205_0 39#ifndef PCI_DEVICE_ID_INTEL_7205_0
36#define PCI_DEVICE_ID_INTEL_7205_0 0x255d 40#define PCI_DEVICE_ID_INTEL_7205_0 0x255d
@@ -64,11 +68,9 @@
64#define PCI_DEVICE_ID_INTEL_7505_1_ERR 0x2551 68#define PCI_DEVICE_ID_INTEL_7505_1_ERR 0x2551
65#endif /* PCI_DEVICE_ID_INTEL_7505_1_ERR */ 69#endif /* PCI_DEVICE_ID_INTEL_7505_1_ERR */
66 70
67
68#define E7XXX_NR_CSROWS 8 /* number of csrows */ 71#define E7XXX_NR_CSROWS 8 /* number of csrows */
69#define E7XXX_NR_DIMMS 8 /* FIXME - is this correct? */ 72#define E7XXX_NR_DIMMS 8 /* FIXME - is this correct? */
70 73
71
72/* E7XXX register addresses - device 0 function 0 */ 74/* E7XXX register addresses - device 0 function 0 */
73#define E7XXX_DRB 0x60 /* DRAM row boundary register (8b) */ 75#define E7XXX_DRB 0x60 /* DRAM row boundary register (8b) */
74#define E7XXX_DRA 0x70 /* DRAM row attribute register (8b) */ 76#define E7XXX_DRA 0x70 /* DRAM row attribute register (8b) */
@@ -118,7 +120,6 @@ enum e7xxx_chips {
118 E7205, 120 E7205,
119}; 121};
120 122
121
122struct e7xxx_pvt { 123struct e7xxx_pvt {
123 struct pci_dev *bridge_ck; 124 struct pci_dev *bridge_ck;
124 u32 tolm; 125 u32 tolm;
@@ -127,13 +128,11 @@ struct e7xxx_pvt {
127 const struct e7xxx_dev_info *dev_info; 128 const struct e7xxx_dev_info *dev_info;
128}; 129};
129 130
130
131struct e7xxx_dev_info { 131struct e7xxx_dev_info {
132 u16 err_dev; 132 u16 err_dev;
133 const char *ctl_name; 133 const char *ctl_name;
134}; 134};
135 135
136
137struct e7xxx_error_info { 136struct e7xxx_error_info {
138 u8 dram_ferr; 137 u8 dram_ferr;
139 u8 dram_nerr; 138 u8 dram_nerr;
@@ -144,108 +143,110 @@ struct e7xxx_error_info {
144 143
145static const struct e7xxx_dev_info e7xxx_devs[] = { 144static const struct e7xxx_dev_info e7xxx_devs[] = {
146 [E7500] = { 145 [E7500] = {
147 .err_dev = PCI_DEVICE_ID_INTEL_7500_1_ERR, 146 .err_dev = PCI_DEVICE_ID_INTEL_7500_1_ERR,
148 .ctl_name = "E7500"}, 147 .ctl_name = "E7500"
148 },
149 [E7501] = { 149 [E7501] = {
150 .err_dev = PCI_DEVICE_ID_INTEL_7501_1_ERR, 150 .err_dev = PCI_DEVICE_ID_INTEL_7501_1_ERR,
151 .ctl_name = "E7501"}, 151 .ctl_name = "E7501"
152 },
152 [E7505] = { 153 [E7505] = {
153 .err_dev = PCI_DEVICE_ID_INTEL_7505_1_ERR, 154 .err_dev = PCI_DEVICE_ID_INTEL_7505_1_ERR,
154 .ctl_name = "E7505"}, 155 .ctl_name = "E7505"
156 },
155 [E7205] = { 157 [E7205] = {
156 .err_dev = PCI_DEVICE_ID_INTEL_7205_1_ERR, 158 .err_dev = PCI_DEVICE_ID_INTEL_7205_1_ERR,
157 .ctl_name = "E7205"}, 159 .ctl_name = "E7205"
160 },
158}; 161};
159 162
160
161/* FIXME - is this valid for both SECDED and S4ECD4ED? */ 163/* FIXME - is this valid for both SECDED and S4ECD4ED? */
162static inline int e7xxx_find_channel(u16 syndrome) 164static inline int e7xxx_find_channel(u16 syndrome)
163{ 165{
164 debugf3("MC: " __FILE__ ": %s()\n", __func__); 166 debugf3("%s()\n", __func__);
165 167
166 if ((syndrome & 0xff00) == 0) 168 if ((syndrome & 0xff00) == 0)
167 return 0; 169 return 0;
170
168 if ((syndrome & 0x00ff) == 0) 171 if ((syndrome & 0x00ff) == 0)
169 return 1; 172 return 1;
173
170 if ((syndrome & 0xf000) == 0 || (syndrome & 0x0f00) == 0) 174 if ((syndrome & 0xf000) == 0 || (syndrome & 0x0f00) == 0)
171 return 0; 175 return 0;
176
172 return 1; 177 return 1;
173} 178}
174 179
175 180static unsigned long ctl_page_to_phys(struct mem_ctl_info *mci,
176static unsigned long 181 unsigned long page)
177ctl_page_to_phys(struct mem_ctl_info *mci, unsigned long page)
178{ 182{
179 u32 remap; 183 u32 remap;
180 struct e7xxx_pvt *pvt = (struct e7xxx_pvt *) mci->pvt_info; 184 struct e7xxx_pvt *pvt = (struct e7xxx_pvt *) mci->pvt_info;
181 185
182 debugf3("MC: " __FILE__ ": %s()\n", __func__); 186 debugf3("%s()\n", __func__);
183 187
184 if ((page < pvt->tolm) || 188 if ((page < pvt->tolm) ||
185 ((page >= 0x100000) && (page < pvt->remapbase))) 189 ((page >= 0x100000) && (page < pvt->remapbase)))
186 return page; 190 return page;
191
187 remap = (page - pvt->tolm) + pvt->remapbase; 192 remap = (page - pvt->tolm) + pvt->remapbase;
193
188 if (remap < pvt->remaplimit) 194 if (remap < pvt->remaplimit)
189 return remap; 195 return remap;
190 printk(KERN_ERR "Invalid page %lx - out of range\n", page); 196
197 e7xxx_printk(KERN_ERR, "Invalid page %lx - out of range\n", page);
191 return pvt->tolm - 1; 198 return pvt->tolm - 1;
192} 199}
193 200
194 201static void process_ce(struct mem_ctl_info *mci,
195static void process_ce(struct mem_ctl_info *mci, struct e7xxx_error_info *info) 202 struct e7xxx_error_info *info)
196{ 203{
197 u32 error_1b, page; 204 u32 error_1b, page;
198 u16 syndrome; 205 u16 syndrome;
199 int row; 206 int row;
200 int channel; 207 int channel;
201 208
202 debugf3("MC: " __FILE__ ": %s()\n", __func__); 209 debugf3("%s()\n", __func__);
203
204 /* read the error address */ 210 /* read the error address */
205 error_1b = info->dram_celog_add; 211 error_1b = info->dram_celog_add;
206 /* FIXME - should use PAGE_SHIFT */ 212 /* FIXME - should use PAGE_SHIFT */
207 page = error_1b >> 6; /* convert the address to 4k page */ 213 page = error_1b >> 6; /* convert the address to 4k page */
208 /* read the syndrome */ 214 /* read the syndrome */
209 syndrome = info->dram_celog_syndrome; 215 syndrome = info->dram_celog_syndrome;
210 /* FIXME - check for -1 */ 216 /* FIXME - check for -1 */
211 row = edac_mc_find_csrow_by_page(mci, page); 217 row = edac_mc_find_csrow_by_page(mci, page);
212 /* convert syndrome to channel */ 218 /* convert syndrome to channel */
213 channel = e7xxx_find_channel(syndrome); 219 channel = e7xxx_find_channel(syndrome);
214 edac_mc_handle_ce(mci, page, 0, syndrome, row, channel, 220 edac_mc_handle_ce(mci, page, 0, syndrome, row, channel, "e7xxx CE");
215 "e7xxx CE");
216} 221}
217 222
218
219static void process_ce_no_info(struct mem_ctl_info *mci) 223static void process_ce_no_info(struct mem_ctl_info *mci)
220{ 224{
221 debugf3("MC: " __FILE__ ": %s()\n", __func__); 225 debugf3("%s()\n", __func__);
222 edac_mc_handle_ce_no_info(mci, "e7xxx CE log register overflow"); 226 edac_mc_handle_ce_no_info(mci, "e7xxx CE log register overflow");
223} 227}
224 228
225 229static void process_ue(struct mem_ctl_info *mci,
226static void process_ue(struct mem_ctl_info *mci, struct e7xxx_error_info *info) 230 struct e7xxx_error_info *info)
227{ 231{
228 u32 error_2b, block_page; 232 u32 error_2b, block_page;
229 int row; 233 int row;
230 234
231 debugf3("MC: " __FILE__ ": %s()\n", __func__); 235 debugf3("%s()\n", __func__);
232
233 /* read the error address */ 236 /* read the error address */
234 error_2b = info->dram_uelog_add; 237 error_2b = info->dram_uelog_add;
235 /* FIXME - should use PAGE_SHIFT */ 238 /* FIXME - should use PAGE_SHIFT */
236 block_page = error_2b >> 6; /* convert to 4k address */ 239 block_page = error_2b >> 6; /* convert to 4k address */
237 row = edac_mc_find_csrow_by_page(mci, block_page); 240 row = edac_mc_find_csrow_by_page(mci, block_page);
238 edac_mc_handle_ue(mci, block_page, 0, row, "e7xxx UE"); 241 edac_mc_handle_ue(mci, block_page, 0, row, "e7xxx UE");
239} 242}
240 243
241
242static void process_ue_no_info(struct mem_ctl_info *mci) 244static void process_ue_no_info(struct mem_ctl_info *mci)
243{ 245{
244 debugf3("MC: " __FILE__ ": %s()\n", __func__); 246 debugf3("%s()\n", __func__);
245 edac_mc_handle_ue_no_info(mci, "e7xxx UE log register overflow"); 247 edac_mc_handle_ue_no_info(mci, "e7xxx UE log register overflow");
246} 248}
247 249
248
249static void e7xxx_get_error_info (struct mem_ctl_info *mci, 250static void e7xxx_get_error_info (struct mem_ctl_info *mci,
250 struct e7xxx_error_info *info) 251 struct e7xxx_error_info *info)
251{ 252{
@@ -253,31 +254,29 @@ static void e7xxx_get_error_info (struct mem_ctl_info *mci,
253 254
254 pvt = (struct e7xxx_pvt *) mci->pvt_info; 255 pvt = (struct e7xxx_pvt *) mci->pvt_info;
255 pci_read_config_byte(pvt->bridge_ck, E7XXX_DRAM_FERR, 256 pci_read_config_byte(pvt->bridge_ck, E7XXX_DRAM_FERR,
256 &info->dram_ferr); 257 &info->dram_ferr);
257 pci_read_config_byte(pvt->bridge_ck, E7XXX_DRAM_NERR, 258 pci_read_config_byte(pvt->bridge_ck, E7XXX_DRAM_NERR,
258 &info->dram_nerr); 259 &info->dram_nerr);
259 260
260 if ((info->dram_ferr & 1) || (info->dram_nerr & 1)) { 261 if ((info->dram_ferr & 1) || (info->dram_nerr & 1)) {
261 pci_read_config_dword(pvt->bridge_ck, E7XXX_DRAM_CELOG_ADD, 262 pci_read_config_dword(pvt->bridge_ck, E7XXX_DRAM_CELOG_ADD,
262 &info->dram_celog_add); 263 &info->dram_celog_add);
263 pci_read_config_word(pvt->bridge_ck, 264 pci_read_config_word(pvt->bridge_ck,
264 E7XXX_DRAM_CELOG_SYNDROME, &info->dram_celog_syndrome); 265 E7XXX_DRAM_CELOG_SYNDROME,
266 &info->dram_celog_syndrome);
265 } 267 }
266 268
267 if ((info->dram_ferr & 2) || (info->dram_nerr & 2)) 269 if ((info->dram_ferr & 2) || (info->dram_nerr & 2))
268 pci_read_config_dword(pvt->bridge_ck, E7XXX_DRAM_UELOG_ADD, 270 pci_read_config_dword(pvt->bridge_ck, E7XXX_DRAM_UELOG_ADD,
269 &info->dram_uelog_add); 271 &info->dram_uelog_add);
270 272
271 if (info->dram_ferr & 3) 273 if (info->dram_ferr & 3)
272 pci_write_bits8(pvt->bridge_ck, E7XXX_DRAM_FERR, 0x03, 274 pci_write_bits8(pvt->bridge_ck, E7XXX_DRAM_FERR, 0x03, 0x03);
273 0x03);
274 275
275 if (info->dram_nerr & 3) 276 if (info->dram_nerr & 3)
276 pci_write_bits8(pvt->bridge_ck, E7XXX_DRAM_NERR, 0x03, 277 pci_write_bits8(pvt->bridge_ck, E7XXX_DRAM_NERR, 0x03, 0x03);
277 0x03);
278} 278}
279 279
280
281static int e7xxx_process_error_info (struct mem_ctl_info *mci, 280static int e7xxx_process_error_info (struct mem_ctl_info *mci,
282 struct e7xxx_error_info *info, int handle_errors) 281 struct e7xxx_error_info *info, int handle_errors)
283{ 282{
@@ -325,17 +324,15 @@ static int e7xxx_process_error_info (struct mem_ctl_info *mci,
325 return error_found; 324 return error_found;
326} 325}
327 326
328
329static void e7xxx_check(struct mem_ctl_info *mci) 327static void e7xxx_check(struct mem_ctl_info *mci)
330{ 328{
331 struct e7xxx_error_info info; 329 struct e7xxx_error_info info;
332 330
333 debugf3("MC: " __FILE__ ": %s()\n", __func__); 331 debugf3("%s()\n", __func__);
334 e7xxx_get_error_info(mci, &info); 332 e7xxx_get_error_info(mci, &info);
335 e7xxx_process_error_info(mci, &info, 1); 333 e7xxx_process_error_info(mci, &info, 1);
336} 334}
337 335
338
339static int e7xxx_probe1(struct pci_dev *pdev, int dev_idx) 336static int e7xxx_probe1(struct pci_dev *pdev, int dev_idx)
340{ 337{
341 int rc = -ENODEV; 338 int rc = -ENODEV;
@@ -349,19 +346,20 @@ static int e7xxx_probe1(struct pci_dev *pdev, int dev_idx)
349 int drc_ddim; /* DRAM Data Integrity Mode 0=none,2=edac */ 346 int drc_ddim; /* DRAM Data Integrity Mode 0=none,2=edac */
350 u32 dra; 347 u32 dra;
351 unsigned long last_cumul_size; 348 unsigned long last_cumul_size;
349 struct e7xxx_error_info discard;
352 350
353 351 debugf0("%s(): mci\n", __func__);
354 debugf0("MC: " __FILE__ ": %s(): mci\n", __func__);
355 352
356 /* need to find out the number of channels */ 353 /* need to find out the number of channels */
357 pci_read_config_dword(pdev, E7XXX_DRC, &drc); 354 pci_read_config_dword(pdev, E7XXX_DRC, &drc);
355
358 /* only e7501 can be single channel */ 356 /* only e7501 can be single channel */
359 if (dev_idx == E7501) { 357 if (dev_idx == E7501) {
360 drc_chan = ((drc >> 22) & 0x1); 358 drc_chan = ((drc >> 22) & 0x1);
361 drc_drbg = (drc >> 18) & 0x3; 359 drc_drbg = (drc >> 18) & 0x3;
362 } 360 }
363 drc_ddim = (drc >> 20) & 0x3;
364 361
362 drc_ddim = (drc >> 20) & 0x3;
365 mci = edac_mc_alloc(sizeof(*pvt), E7XXX_NR_CSROWS, drc_chan + 1); 363 mci = edac_mc_alloc(sizeof(*pvt), E7XXX_NR_CSROWS, drc_chan + 1);
366 364
367 if (mci == NULL) { 365 if (mci == NULL) {
@@ -369,33 +367,31 @@ static int e7xxx_probe1(struct pci_dev *pdev, int dev_idx)
369 goto fail; 367 goto fail;
370 } 368 }
371 369
372 debugf3("MC: " __FILE__ ": %s(): init mci\n", __func__); 370 debugf3("%s(): init mci\n", __func__);
373
374 mci->mtype_cap = MEM_FLAG_RDDR; 371 mci->mtype_cap = MEM_FLAG_RDDR;
375 mci->edac_ctl_cap = 372 mci->edac_ctl_cap = EDAC_FLAG_NONE | EDAC_FLAG_SECDED |
376 EDAC_FLAG_NONE | EDAC_FLAG_SECDED | EDAC_FLAG_S4ECD4ED; 373 EDAC_FLAG_S4ECD4ED;
377 /* FIXME - what if different memory types are in different csrows? */ 374 /* FIXME - what if different memory types are in different csrows? */
378 mci->mod_name = BS_MOD_STR; 375 mci->mod_name = EDAC_MOD_STR;
379 mci->mod_ver = "$Revision: 1.5.2.9 $"; 376 mci->mod_ver = "$Revision: 1.5.2.9 $";
380 mci->pdev = pdev; 377 mci->pdev = pdev;
381 378
382 debugf3("MC: " __FILE__ ": %s(): init pvt\n", __func__); 379 debugf3("%s(): init pvt\n", __func__);
383 pvt = (struct e7xxx_pvt *) mci->pvt_info; 380 pvt = (struct e7xxx_pvt *) mci->pvt_info;
384 pvt->dev_info = &e7xxx_devs[dev_idx]; 381 pvt->dev_info = &e7xxx_devs[dev_idx];
385 pvt->bridge_ck = pci_get_device(PCI_VENDOR_ID_INTEL, 382 pvt->bridge_ck = pci_get_device(PCI_VENDOR_ID_INTEL,
386 pvt->dev_info->err_dev, 383 pvt->dev_info->err_dev,
387 pvt->bridge_ck); 384 pvt->bridge_ck);
385
388 if (!pvt->bridge_ck) { 386 if (!pvt->bridge_ck) {
389 printk(KERN_ERR 387 e7xxx_printk(KERN_ERR, "error reporting device not found:"
390 "MC: error reporting device not found:" 388 "vendor %x device 0x%x (broken BIOS?)\n",
391 "vendor %x device 0x%x (broken BIOS?)\n", 389 PCI_VENDOR_ID_INTEL, e7xxx_devs[dev_idx].err_dev);
392 PCI_VENDOR_ID_INTEL, e7xxx_devs[dev_idx].err_dev);
393 goto fail; 390 goto fail;
394 } 391 }
395 392
396 debugf3("MC: " __FILE__ ": %s(): more mci init\n", __func__); 393 debugf3("%s(): more mci init\n", __func__);
397 mci->ctl_name = pvt->dev_info->ctl_name; 394 mci->ctl_name = pvt->dev_info->ctl_name;
398
399 mci->edac_check = e7xxx_check; 395 mci->edac_check = e7xxx_check;
400 mci->ctl_page_to_phys = ctl_page_to_phys; 396 mci->ctl_page_to_phys = ctl_page_to_phys;
401 397
@@ -418,17 +414,18 @@ static int e7xxx_probe1(struct pci_dev *pdev, int dev_idx)
418 pci_read_config_byte(mci->pdev, E7XXX_DRB + index, &value); 414 pci_read_config_byte(mci->pdev, E7XXX_DRB + index, &value);
419 /* convert a 64 or 32 MiB DRB to a page size. */ 415 /* convert a 64 or 32 MiB DRB to a page size. */
420 cumul_size = value << (25 + drc_drbg - PAGE_SHIFT); 416 cumul_size = value << (25 + drc_drbg - PAGE_SHIFT);
421 debugf3("MC: " __FILE__ ": %s(): (%d) cumul_size 0x%x\n", 417 debugf3("%s(): (%d) cumul_size 0x%x\n", __func__, index,
422 __func__, index, cumul_size); 418 cumul_size);
419
423 if (cumul_size == last_cumul_size) 420 if (cumul_size == last_cumul_size)
424 continue; /* not populated */ 421 continue; /* not populated */
425 422
426 csrow->first_page = last_cumul_size; 423 csrow->first_page = last_cumul_size;
427 csrow->last_page = cumul_size - 1; 424 csrow->last_page = cumul_size - 1;
428 csrow->nr_pages = cumul_size - last_cumul_size; 425 csrow->nr_pages = cumul_size - last_cumul_size;
429 last_cumul_size = cumul_size; 426 last_cumul_size = cumul_size;
430 csrow->grain = 1 << 12; /* 4KiB - resolution of CELOG */ 427 csrow->grain = 1 << 12; /* 4KiB - resolution of CELOG */
431 csrow->mtype = MEM_RDDR; /* only one type supported */ 428 csrow->mtype = MEM_RDDR; /* only one type supported */
432 csrow->dtype = mem_dev ? DEV_X4 : DEV_X8; 429 csrow->dtype = mem_dev ? DEV_X4 : DEV_X8;
433 430
434 /* 431 /*
@@ -449,8 +446,7 @@ static int e7xxx_probe1(struct pci_dev *pdev, int dev_idx)
449 446
450 mci->edac_cap |= EDAC_FLAG_NONE; 447 mci->edac_cap |= EDAC_FLAG_NONE;
451 448
452 debugf3("MC: " __FILE__ ": %s(): tolm, remapbase, remaplimit\n", 449 debugf3("%s(): tolm, remapbase, remaplimit\n", __func__);
453 __func__);
454 /* load the top of low memory, remap base, and remap limit vars */ 450 /* load the top of low memory, remap base, and remap limit vars */
455 pci_read_config_word(mci->pdev, E7XXX_TOLM, &pci_data); 451 pci_read_config_word(mci->pdev, E7XXX_TOLM, &pci_data);
456 pvt->tolm = ((u32) pci_data) << 4; 452 pvt->tolm = ((u32) pci_data) << 4;
@@ -458,22 +454,20 @@ static int e7xxx_probe1(struct pci_dev *pdev, int dev_idx)
458 pvt->remapbase = ((u32) pci_data) << 14; 454 pvt->remapbase = ((u32) pci_data) << 14;
459 pci_read_config_word(mci->pdev, E7XXX_REMAPLIMIT, &pci_data); 455 pci_read_config_word(mci->pdev, E7XXX_REMAPLIMIT, &pci_data);
460 pvt->remaplimit = ((u32) pci_data) << 14; 456 pvt->remaplimit = ((u32) pci_data) << 14;
461 printk("tolm = %x, remapbase = %x, remaplimit = %x\n", pvt->tolm, 457 e7xxx_printk(KERN_INFO,
462 pvt->remapbase, pvt->remaplimit); 458 "tolm = %x, remapbase = %x, remaplimit = %x\n", pvt->tolm,
459 pvt->remapbase, pvt->remaplimit);
463 460
464 /* clear any pending errors, or initial state bits */ 461 /* clear any pending errors, or initial state bits */
465 pci_write_bits8(pvt->bridge_ck, E7XXX_DRAM_FERR, 0x03, 0x03); 462 e7xxx_get_error_info(mci, &discard);
466 pci_write_bits8(pvt->bridge_ck, E7XXX_DRAM_NERR, 0x03, 0x03);
467 463
468 if (edac_mc_add_mc(mci) != 0) { 464 if (edac_mc_add_mc(mci) != 0) {
469 debugf3("MC: " __FILE__ 465 debugf3("%s(): failed edac_mc_add_mc()\n", __func__);
470 ": %s(): failed edac_mc_add_mc()\n",
471 __func__);
472 goto fail; 466 goto fail;
473 } 467 }
474 468
475 /* get this far and it's successful */ 469 /* get this far and it's successful */
476 debugf3("MC: " __FILE__ ": %s(): success\n", __func__); 470 debugf3("%s(): success\n", __func__);
477 return 0; 471 return 0;
478 472
479fail: 473fail:
@@ -487,62 +481,67 @@ fail:
487} 481}
488 482
489/* returns count (>= 0), or negative on error */ 483/* returns count (>= 0), or negative on error */
490static int __devinit 484static int __devinit e7xxx_init_one(struct pci_dev *pdev,
491e7xxx_init_one(struct pci_dev *pdev, const struct pci_device_id *ent) 485 const struct pci_device_id *ent)
492{ 486{
493 debugf0("MC: " __FILE__ ": %s()\n", __func__); 487 debugf0("%s()\n", __func__);
494 488
495 /* wake up and enable device */ 489 /* wake up and enable device */
496 return pci_enable_device(pdev) ? 490 return pci_enable_device(pdev) ?
497 -EIO : e7xxx_probe1(pdev, ent->driver_data); 491 -EIO : e7xxx_probe1(pdev, ent->driver_data);
498} 492}
499 493
500
501static void __devexit e7xxx_remove_one(struct pci_dev *pdev) 494static void __devexit e7xxx_remove_one(struct pci_dev *pdev)
502{ 495{
503 struct mem_ctl_info *mci; 496 struct mem_ctl_info *mci;
504 struct e7xxx_pvt *pvt; 497 struct e7xxx_pvt *pvt;
505 498
506 debugf0(__FILE__ ": %s()\n", __func__); 499 debugf0("%s()\n", __func__);
507 500
508 if (((mci = edac_mc_find_mci_by_pdev(pdev)) != 0) && 501 if ((mci = edac_mc_del_mc(pdev)) == NULL)
509 edac_mc_del_mc(mci)) { 502 return;
510 pvt = (struct e7xxx_pvt *) mci->pvt_info;
511 pci_dev_put(pvt->bridge_ck);
512 edac_mc_free(mci);
513 }
514}
515 503
504 pvt = (struct e7xxx_pvt *) mci->pvt_info;
505 pci_dev_put(pvt->bridge_ck);
506 edac_mc_free(mci);
507}
516 508
517static const struct pci_device_id e7xxx_pci_tbl[] __devinitdata = { 509static const struct pci_device_id e7xxx_pci_tbl[] __devinitdata = {
518 {PCI_VEND_DEV(INTEL, 7205_0), PCI_ANY_ID, PCI_ANY_ID, 0, 0, 510 {
519 E7205}, 511 PCI_VEND_DEV(INTEL, 7205_0), PCI_ANY_ID, PCI_ANY_ID, 0, 0,
520 {PCI_VEND_DEV(INTEL, 7500_0), PCI_ANY_ID, PCI_ANY_ID, 0, 0, 512 E7205
521 E7500}, 513 },
522 {PCI_VEND_DEV(INTEL, 7501_0), PCI_ANY_ID, PCI_ANY_ID, 0, 0, 514 {
523 E7501}, 515 PCI_VEND_DEV(INTEL, 7500_0), PCI_ANY_ID, PCI_ANY_ID, 0, 0,
524 {PCI_VEND_DEV(INTEL, 7505_0), PCI_ANY_ID, PCI_ANY_ID, 0, 0, 516 E7500
525 E7505}, 517 },
526 {0,} /* 0 terminated list. */ 518 {
519 PCI_VEND_DEV(INTEL, 7501_0), PCI_ANY_ID, PCI_ANY_ID, 0, 0,
520 E7501
521 },
522 {
523 PCI_VEND_DEV(INTEL, 7505_0), PCI_ANY_ID, PCI_ANY_ID, 0, 0,
524 E7505
525 },
526 {
527 0,
528 } /* 0 terminated list. */
527}; 529};
528 530
529MODULE_DEVICE_TABLE(pci, e7xxx_pci_tbl); 531MODULE_DEVICE_TABLE(pci, e7xxx_pci_tbl);
530 532
531
532static struct pci_driver e7xxx_driver = { 533static struct pci_driver e7xxx_driver = {
533 .name = BS_MOD_STR, 534 .name = EDAC_MOD_STR,
534 .probe = e7xxx_init_one, 535 .probe = e7xxx_init_one,
535 .remove = __devexit_p(e7xxx_remove_one), 536 .remove = __devexit_p(e7xxx_remove_one),
536 .id_table = e7xxx_pci_tbl, 537 .id_table = e7xxx_pci_tbl,
537}; 538};
538 539
539
540static int __init e7xxx_init(void) 540static int __init e7xxx_init(void)
541{ 541{
542 return pci_register_driver(&e7xxx_driver); 542 return pci_register_driver(&e7xxx_driver);
543} 543}
544 544
545
546static void __exit e7xxx_exit(void) 545static void __exit e7xxx_exit(void)
547{ 546{
548 pci_unregister_driver(&e7xxx_driver); 547 pci_unregister_driver(&e7xxx_driver);
@@ -551,8 +550,7 @@ static void __exit e7xxx_exit(void)
551module_init(e7xxx_init); 550module_init(e7xxx_init);
552module_exit(e7xxx_exit); 551module_exit(e7xxx_exit);
553 552
554
555MODULE_LICENSE("GPL"); 553MODULE_LICENSE("GPL");
556MODULE_AUTHOR("Linux Networx (http://lnxi.com) Thayne Harbaugh et al\n" 554MODULE_AUTHOR("Linux Networx (http://lnxi.com) Thayne Harbaugh et al\n"
557 "Based on.work by Dan Hollis et al"); 555 "Based on.work by Dan Hollis et al");
558MODULE_DESCRIPTION("MC support for Intel e7xxx memory controllers"); 556MODULE_DESCRIPTION("MC support for Intel e7xxx memory controllers");