diff options
Diffstat (limited to 'drivers/edac/amd76x_edac.c')
-rw-r--r-- | drivers/edac/amd76x_edac.c | 26 |
1 files changed, 13 insertions, 13 deletions
diff --git a/drivers/edac/amd76x_edac.c b/drivers/edac/amd76x_edac.c index cc392eebee5c..1c1e02e59585 100644 --- a/drivers/edac/amd76x_edac.c +++ b/drivers/edac/amd76x_edac.c | |||
@@ -86,9 +86,9 @@ struct amd76x_dev_info { | |||
86 | 86 | ||
87 | static const struct amd76x_dev_info amd76x_devs[] = { | 87 | static const struct amd76x_dev_info amd76x_devs[] = { |
88 | [AMD761] = { | 88 | [AMD761] = { |
89 | .ctl_name = "AMD761"}, | 89 | .ctl_name = "AMD761"}, |
90 | [AMD762] = { | 90 | [AMD762] = { |
91 | .ctl_name = "AMD762"}, | 91 | .ctl_name = "AMD762"}, |
92 | }; | 92 | }; |
93 | 93 | ||
94 | static struct edac_pci_ctl_info *amd76x_pci; | 94 | static struct edac_pci_ctl_info *amd76x_pci; |
@@ -102,13 +102,13 @@ static struct edac_pci_ctl_info *amd76x_pci; | |||
102 | * on the chip so that further errors will be reported | 102 | * on the chip so that further errors will be reported |
103 | */ | 103 | */ |
104 | static void amd76x_get_error_info(struct mem_ctl_info *mci, | 104 | static void amd76x_get_error_info(struct mem_ctl_info *mci, |
105 | struct amd76x_error_info *info) | 105 | struct amd76x_error_info *info) |
106 | { | 106 | { |
107 | struct pci_dev *pdev; | 107 | struct pci_dev *pdev; |
108 | 108 | ||
109 | pdev = to_pci_dev(mci->dev); | 109 | pdev = to_pci_dev(mci->dev); |
110 | pci_read_config_dword(pdev, AMD76X_ECC_MODE_STATUS, | 110 | pci_read_config_dword(pdev, AMD76X_ECC_MODE_STATUS, |
111 | &info->ecc_mode_status); | 111 | &info->ecc_mode_status); |
112 | 112 | ||
113 | if (info->ecc_mode_status & BIT(8)) | 113 | if (info->ecc_mode_status & BIT(8)) |
114 | pci_write_bits32(pdev, AMD76X_ECC_MODE_STATUS, | 114 | pci_write_bits32(pdev, AMD76X_ECC_MODE_STATUS, |
@@ -130,8 +130,8 @@ static void amd76x_get_error_info(struct mem_ctl_info *mci, | |||
130 | * then attempt to handle and clean up after the error | 130 | * then attempt to handle and clean up after the error |
131 | */ | 131 | */ |
132 | static int amd76x_process_error_info(struct mem_ctl_info *mci, | 132 | static int amd76x_process_error_info(struct mem_ctl_info *mci, |
133 | struct amd76x_error_info *info, | 133 | struct amd76x_error_info *info, |
134 | int handle_errors) | 134 | int handle_errors) |
135 | { | 135 | { |
136 | int error_found; | 136 | int error_found; |
137 | u32 row; | 137 | u32 row; |
@@ -147,7 +147,7 @@ static int amd76x_process_error_info(struct mem_ctl_info *mci, | |||
147 | if (handle_errors) { | 147 | if (handle_errors) { |
148 | row = (info->ecc_mode_status >> 4) & 0xf; | 148 | row = (info->ecc_mode_status >> 4) & 0xf; |
149 | edac_mc_handle_ue(mci, mci->csrows[row].first_page, 0, | 149 | edac_mc_handle_ue(mci, mci->csrows[row].first_page, 0, |
150 | row, mci->ctl_name); | 150 | row, mci->ctl_name); |
151 | } | 151 | } |
152 | } | 152 | } |
153 | 153 | ||
@@ -160,7 +160,7 @@ static int amd76x_process_error_info(struct mem_ctl_info *mci, | |||
160 | if (handle_errors) { | 160 | if (handle_errors) { |
161 | row = info->ecc_mode_status & 0xf; | 161 | row = info->ecc_mode_status & 0xf; |
162 | edac_mc_handle_ce(mci, mci->csrows[row].first_page, 0, | 162 | edac_mc_handle_ce(mci, mci->csrows[row].first_page, 0, |
163 | 0, row, 0, mci->ctl_name); | 163 | 0, row, 0, mci->ctl_name); |
164 | } | 164 | } |
165 | } | 165 | } |
166 | 166 | ||
@@ -183,7 +183,7 @@ static void amd76x_check(struct mem_ctl_info *mci) | |||
183 | } | 183 | } |
184 | 184 | ||
185 | static void amd76x_init_csrows(struct mem_ctl_info *mci, struct pci_dev *pdev, | 185 | static void amd76x_init_csrows(struct mem_ctl_info *mci, struct pci_dev *pdev, |
186 | enum edac_type edac_mode) | 186 | enum edac_type edac_mode) |
187 | { | 187 | { |
188 | struct csrow_info *csrow; | 188 | struct csrow_info *csrow; |
189 | u32 mba, mba_base, mba_mask, dms; | 189 | u32 mba, mba_base, mba_mask, dms; |
@@ -194,7 +194,7 @@ static void amd76x_init_csrows(struct mem_ctl_info *mci, struct pci_dev *pdev, | |||
194 | 194 | ||
195 | /* find the DRAM Chip Select Base address and mask */ | 195 | /* find the DRAM Chip Select Base address and mask */ |
196 | pci_read_config_dword(pdev, | 196 | pci_read_config_dword(pdev, |
197 | AMD76X_MEM_BASE_ADDR + (index * 4), &mba); | 197 | AMD76X_MEM_BASE_ADDR + (index * 4), &mba); |
198 | 198 | ||
199 | if (!(mba & BIT(0))) | 199 | if (!(mba & BIT(0))) |
200 | continue; | 200 | continue; |
@@ -249,7 +249,7 @@ static int amd76x_probe1(struct pci_dev *pdev, int dev_idx) | |||
249 | mci->mtype_cap = MEM_FLAG_RDDR; | 249 | mci->mtype_cap = MEM_FLAG_RDDR; |
250 | mci->edac_ctl_cap = EDAC_FLAG_NONE | EDAC_FLAG_EC | EDAC_FLAG_SECDED; | 250 | mci->edac_ctl_cap = EDAC_FLAG_NONE | EDAC_FLAG_EC | EDAC_FLAG_SECDED; |
251 | mci->edac_cap = ems_mode ? | 251 | mci->edac_cap = ems_mode ? |
252 | (EDAC_FLAG_EC | EDAC_FLAG_SECDED) : EDAC_FLAG_NONE; | 252 | (EDAC_FLAG_EC | EDAC_FLAG_SECDED) : EDAC_FLAG_NONE; |
253 | mci->mod_name = EDAC_MOD_STR; | 253 | mci->mod_name = EDAC_MOD_STR; |
254 | mci->mod_ver = AMD76X_REVISION; | 254 | mci->mod_ver = AMD76X_REVISION; |
255 | mci->ctl_name = amd76x_devs[dev_idx].ctl_name; | 255 | mci->ctl_name = amd76x_devs[dev_idx].ctl_name; |
@@ -283,14 +283,14 @@ static int amd76x_probe1(struct pci_dev *pdev, int dev_idx) | |||
283 | debugf3("%s(): success\n", __func__); | 283 | debugf3("%s(): success\n", __func__); |
284 | return 0; | 284 | return 0; |
285 | 285 | ||
286 | fail: | 286 | fail: |
287 | edac_mc_free(mci); | 287 | edac_mc_free(mci); |
288 | return -ENODEV; | 288 | return -ENODEV; |
289 | } | 289 | } |
290 | 290 | ||
291 | /* returns count (>= 0), or negative on error */ | 291 | /* returns count (>= 0), or negative on error */ |
292 | static int __devinit amd76x_init_one(struct pci_dev *pdev, | 292 | static int __devinit amd76x_init_one(struct pci_dev *pdev, |
293 | const struct pci_device_id *ent) | 293 | const struct pci_device_id *ent) |
294 | { | 294 | { |
295 | debugf0("%s()\n", __func__); | 295 | debugf0("%s()\n", __func__); |
296 | 296 | ||