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Diffstat (limited to 'drivers/edac/amd64_edac_inj.c')
-rw-r--r--drivers/edac/amd64_edac_inj.c8
1 files changed, 4 insertions, 4 deletions
diff --git a/drivers/edac/amd64_edac_inj.c b/drivers/edac/amd64_edac_inj.c
index 688478de1cbd..303f10e03dda 100644
--- a/drivers/edac/amd64_edac_inj.c
+++ b/drivers/edac/amd64_edac_inj.c
@@ -117,13 +117,13 @@ static ssize_t amd64_inject_read_store(struct mem_ctl_info *mci,
117 /* Form value to choose 16-byte section of cacheline */ 117 /* Form value to choose 16-byte section of cacheline */
118 section = F10_NB_ARRAY_DRAM_ECC | 118 section = F10_NB_ARRAY_DRAM_ECC |
119 SET_NB_ARRAY_ADDRESS(pvt->injection.section); 119 SET_NB_ARRAY_ADDRESS(pvt->injection.section);
120 pci_write_config_dword(pvt->F3, F10_NB_ARRAY_ADDR, section); 120 amd64_write_pci_cfg(pvt->F3, F10_NB_ARRAY_ADDR, section);
121 121
122 word_bits = SET_NB_DRAM_INJECTION_READ(pvt->injection.word, 122 word_bits = SET_NB_DRAM_INJECTION_READ(pvt->injection.word,
123 pvt->injection.bit_map); 123 pvt->injection.bit_map);
124 124
125 /* Issue 'word' and 'bit' along with the READ request */ 125 /* Issue 'word' and 'bit' along with the READ request */
126 pci_write_config_dword(pvt->F3, F10_NB_ARRAY_DATA, word_bits); 126 amd64_write_pci_cfg(pvt->F3, F10_NB_ARRAY_DATA, word_bits);
127 127
128 debugf0("section=0x%x word_bits=0x%x\n", section, word_bits); 128 debugf0("section=0x%x word_bits=0x%x\n", section, word_bits);
129 129
@@ -150,13 +150,13 @@ static ssize_t amd64_inject_write_store(struct mem_ctl_info *mci,
150 /* Form value to choose 16-byte section of cacheline */ 150 /* Form value to choose 16-byte section of cacheline */
151 section = F10_NB_ARRAY_DRAM_ECC | 151 section = F10_NB_ARRAY_DRAM_ECC |
152 SET_NB_ARRAY_ADDRESS(pvt->injection.section); 152 SET_NB_ARRAY_ADDRESS(pvt->injection.section);
153 pci_write_config_dword(pvt->F3, F10_NB_ARRAY_ADDR, section); 153 amd64_write_pci_cfg(pvt->F3, F10_NB_ARRAY_ADDR, section);
154 154
155 word_bits = SET_NB_DRAM_INJECTION_WRITE(pvt->injection.word, 155 word_bits = SET_NB_DRAM_INJECTION_WRITE(pvt->injection.word,
156 pvt->injection.bit_map); 156 pvt->injection.bit_map);
157 157
158 /* Issue 'word' and 'bit' along with the READ request */ 158 /* Issue 'word' and 'bit' along with the READ request */
159 pci_write_config_dword(pvt->F3, F10_NB_ARRAY_DATA, word_bits); 159 amd64_write_pci_cfg(pvt->F3, F10_NB_ARRAY_DATA, word_bits);
160 160
161 debugf0("section=0x%x word_bits=0x%x\n", section, word_bits); 161 debugf0("section=0x%x word_bits=0x%x\n", section, word_bits);
162 162