diff options
Diffstat (limited to 'drivers/edac/amd64_edac.h')
-rw-r--r-- | drivers/edac/amd64_edac.h | 34 |
1 files changed, 14 insertions, 20 deletions
diff --git a/drivers/edac/amd64_edac.h b/drivers/edac/amd64_edac.h index 24e280423de0..f8c187ea6e38 100644 --- a/drivers/edac/amd64_edac.h +++ b/drivers/edac/amd64_edac.h | |||
@@ -135,13 +135,9 @@ | |||
135 | #define EDAC_MAX_NUMNODES 8 | 135 | #define EDAC_MAX_NUMNODES 8 |
136 | 136 | ||
137 | /* Extended Model from CPUID, for CPU Revision numbers */ | 137 | /* Extended Model from CPUID, for CPU Revision numbers */ |
138 | #define OPTERON_CPU_LE_REV_C 0 | 138 | #define K8_REV_D 1 |
139 | #define OPTERON_CPU_REV_D 1 | 139 | #define K8_REV_E 2 |
140 | #define OPTERON_CPU_REV_E 2 | 140 | #define K8_REV_F 4 |
141 | |||
142 | /* NPT processors have the following Extended Models */ | ||
143 | #define OPTERON_CPU_REV_F 4 | ||
144 | #define OPTERON_CPU_REV_FA 5 | ||
145 | 141 | ||
146 | /* Hardware limit on ChipSelect rows per MC and processors per system */ | 142 | /* Hardware limit on ChipSelect rows per MC and processors per system */ |
147 | #define MAX_CS_COUNT 8 | 143 | #define MAX_CS_COUNT 8 |
@@ -243,7 +239,7 @@ | |||
243 | #define F10_DCHR_1 0x194 | 239 | #define F10_DCHR_1 0x194 |
244 | 240 | ||
245 | #define F10_DCHR_FOUR_RANK_DIMM BIT(18) | 241 | #define F10_DCHR_FOUR_RANK_DIMM BIT(18) |
246 | #define F10_DCHR_Ddr3Mode BIT(8) | 242 | #define DDR3_MODE BIT(8) |
247 | #define F10_DCHR_MblMode BIT(6) | 243 | #define F10_DCHR_MblMode BIT(6) |
248 | 244 | ||
249 | 245 | ||
@@ -501,7 +497,6 @@ struct scrubrate { | |||
501 | }; | 497 | }; |
502 | 498 | ||
503 | extern struct scrubrate scrubrates[23]; | 499 | extern struct scrubrate scrubrates[23]; |
504 | extern u32 revf_quad_ddr2_shift[16]; | ||
505 | extern const char *tt_msgs[4]; | 500 | extern const char *tt_msgs[4]; |
506 | extern const char *ll_msgs[4]; | 501 | extern const char *ll_msgs[4]; |
507 | extern const char *rrrr_msgs[16]; | 502 | extern const char *rrrr_msgs[16]; |
@@ -531,17 +526,16 @@ extern struct mcidev_sysfs_attribute amd64_dbg_attrs[NUM_DBG_ATTRS], | |||
531 | * functions and per device encoding/decoding logic. | 526 | * functions and per device encoding/decoding logic. |
532 | */ | 527 | */ |
533 | struct low_ops { | 528 | struct low_ops { |
534 | int (*probe_valid_hardware)(struct amd64_pvt *pvt); | 529 | int (*probe_valid_hardware) (struct amd64_pvt *pvt); |
535 | int (*early_channel_count)(struct amd64_pvt *pvt); | 530 | int (*early_channel_count) (struct amd64_pvt *pvt); |
536 | 531 | ||
537 | u64 (*get_error_address)(struct mem_ctl_info *mci, | 532 | u64 (*get_error_address) (struct mem_ctl_info *mci, |
538 | struct err_regs *info); | 533 | struct err_regs *info); |
539 | void (*read_dram_base_limit)(struct amd64_pvt *pvt, int dram); | 534 | void (*read_dram_base_limit) (struct amd64_pvt *pvt, int dram); |
540 | void (*read_dram_ctl_register)(struct amd64_pvt *pvt); | 535 | void (*read_dram_ctl_register) (struct amd64_pvt *pvt); |
541 | void (*map_sysaddr_to_csrow)(struct mem_ctl_info *mci, | 536 | void (*map_sysaddr_to_csrow) (struct mem_ctl_info *mci, |
542 | struct err_regs *info, | 537 | struct err_regs *info, u64 SystemAddr); |
543 | u64 SystemAddr); | 538 | int (*dbam_to_cs) (struct amd64_pvt *pvt, int cs_mode); |
544 | int (*dbam_map_to_pages)(struct amd64_pvt *pvt, int dram_map); | ||
545 | }; | 539 | }; |
546 | 540 | ||
547 | struct amd64_family_type { | 541 | struct amd64_family_type { |