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path: root/drivers/edac/amd64_edac.c
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Diffstat (limited to 'drivers/edac/amd64_edac.c')
-rw-r--r--drivers/edac/amd64_edac.c15
1 files changed, 9 insertions, 6 deletions
diff --git a/drivers/edac/amd64_edac.c b/drivers/edac/amd64_edac.c
index 910b0116c128..e1d13c463c90 100644
--- a/drivers/edac/amd64_edac.c
+++ b/drivers/edac/amd64_edac.c
@@ -2048,12 +2048,18 @@ static int init_csrows(struct mem_ctl_info *mci)
2048 edac_dbg(1, "MC node: %d, csrow: %d\n", 2048 edac_dbg(1, "MC node: %d, csrow: %d\n",
2049 pvt->mc_node_id, i); 2049 pvt->mc_node_id, i);
2050 2050
2051 if (row_dct0) 2051 if (row_dct0) {
2052 nr_pages = amd64_csrow_nr_pages(pvt, 0, i); 2052 nr_pages = amd64_csrow_nr_pages(pvt, 0, i);
2053 csrow->channels[0]->dimm->nr_pages = nr_pages;
2054 }
2053 2055
2054 /* K8 has only one DCT */ 2056 /* K8 has only one DCT */
2055 if (boot_cpu_data.x86 != 0xf && row_dct1) 2057 if (boot_cpu_data.x86 != 0xf && row_dct1) {
2056 nr_pages += amd64_csrow_nr_pages(pvt, 1, i); 2058 int row_dct1_pages = amd64_csrow_nr_pages(pvt, 1, i);
2059
2060 csrow->channels[1]->dimm->nr_pages = row_dct1_pages;
2061 nr_pages += row_dct1_pages;
2062 }
2057 2063
2058 mtype = amd64_determine_memory_type(pvt, i); 2064 mtype = amd64_determine_memory_type(pvt, i);
2059 2065
@@ -2072,9 +2078,7 @@ static int init_csrows(struct mem_ctl_info *mci)
2072 dimm = csrow->channels[j]->dimm; 2078 dimm = csrow->channels[j]->dimm;
2073 dimm->mtype = mtype; 2079 dimm->mtype = mtype;
2074 dimm->edac_mode = edac_mode; 2080 dimm->edac_mode = edac_mode;
2075 dimm->nr_pages = nr_pages;
2076 } 2081 }
2077 csrow->nr_pages = nr_pages;
2078 } 2082 }
2079 2083
2080 return empty; 2084 return empty;
@@ -2419,7 +2423,6 @@ static int amd64_init_one_instance(struct pci_dev *F2)
2419 2423
2420 mci->pvt_info = pvt; 2424 mci->pvt_info = pvt;
2421 mci->pdev = &pvt->F2->dev; 2425 mci->pdev = &pvt->F2->dev;
2422 mci->csbased = 1;
2423 2426
2424 setup_mci_misc_attrs(mci, fam_type); 2427 setup_mci_misc_attrs(mci, fam_type);
2425 2428