1 files changed, 6 insertions, 8 deletions

diff --git a/drivers/edac/amd64_edac.c b/drivers/edac/amd64_edac.c
index 4f4ac82382f7..a38831c82649 100644
--- a/drivers/edac/amd64_edac.c
+++ b/drivers/edac/amd64_edac.c
@@ -1122,7 +1122,7 @@ static void k8_read_dram_base_limit(struct amd64_pvt *pvt, int dram)
                 debugf0("Reading K8_DRAM_BASE_LOW failed\n");
 
         /* Extract parts into separate data entries */
-        pvt->dram_base[dram] = ((u64) low & 0xFFFF0000) << 24;
+        pvt->dram_base[dram] = ((u64) low & 0xFFFF0000) << 8;
         pvt->dram_IntlvEn[dram] = (low >> 8) & 0x7;
         pvt->dram_rw_en[dram] = (low & 0x3);
 
@@ -1135,7 +1135,7 @@ static void k8_read_dram_base_limit(struct amd64_pvt *pvt, int dram)
          * Extract parts into separate data entries. Limit is the HIGHEST memory
          * location of the region, so lower 24 bits need to be all ones
          */
-        pvt->dram_limit[dram] = (((u64) low & 0xFFFF0000) << 24) | 0x00FFFFFF;
+        pvt->dram_limit[dram] = (((u64) low & 0xFFFF0000) << 8) | 0x00FFFFFF;
         pvt->dram_IntlvSel[dram] = (low >> 8) & 0x7;
         pvt->dram_DstNode[dram] = (low & 0x7);
 }
@@ -1369,7 +1369,7 @@ static void f10_read_dram_base_limit(struct amd64_pvt *pvt, int dram)
         pvt->dram_IntlvEn[dram] = (low_base >> 8) & 0x7;
 
         pvt->dram_base[dram] = (((u64)high_base & 0x000000FF) << 40) |
-                               (((u64)low_base  & 0xFFFF0000) << 24);
+                               (((u64)low_base  & 0xFFFF0000) << 8);
 
         low_offset = K8_DRAM_LIMIT_LOW + (dram << 3);
         high_offset = F10_DRAM_LIMIT_HIGH + (dram << 3);
@@ -1391,7 +1391,7 @@ static void f10_read_dram_base_limit(struct amd64_pvt *pvt, int dram)
          * memory location of the region, so low 24 bits need to be all ones.
          */
         pvt->dram_limit[dram] = (((u64)high_limit & 0x000000FF) << 40) |
-                                (((u64) low_limit & 0xFFFF0000) << 24) |
+                                (((u64) low_limit & 0xFFFF0000) << 8) |
                                 0x00FFFFFF;
 }
 
@@ -2254,7 +2254,7 @@ static inline void __amd64_decode_bus_error(struct mem_ctl_info *mci,
 {
         u32 ec  = ERROR_CODE(info->nbsl);
         u32 xec = EXT_ERROR_CODE(info->nbsl);
-        int ecc_type = info->nbsh & (0x3 << 13);
+        int ecc_type = (info->nbsh >> 13) & 0x3;
 
         /* Bail early out if this was an 'observed' error */
         if (PP(ec) == K8_NBSL_PP_OBS)
@@ -3163,7 +3163,7 @@ static int __init amd64_edac_init(void)
         opstate_init();
 
         if (cache_k8_northbridges() < 0)
-                goto err_exit;
+                return err;
 
         err = pci_register_driver(&amd64_pci_driver);
         if (err)
@@ -3189,8 +3189,6 @@ static int __init amd64_edac_init(void)
 
 err_2nd_stage:
         debugf0("2nd stage failed\n");
-
-err_exit:
         pci_unregister_driver(&amd64_pci_driver);
 
         return err;