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path: root/drivers/edac/amd64_edac.c
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Diffstat (limited to 'drivers/edac/amd64_edac.c')
-rw-r--r--drivers/edac/amd64_edac.c47
1 files changed, 29 insertions, 18 deletions
diff --git a/drivers/edac/amd64_edac.c b/drivers/edac/amd64_edac.c
index df5b68433f34..000dc67b85b7 100644
--- a/drivers/edac/amd64_edac.c
+++ b/drivers/edac/amd64_edac.c
@@ -197,7 +197,7 @@ static int amd64_get_scrub_rate(struct mem_ctl_info *mci, u32 *bw)
197 edac_printk(KERN_DEBUG, EDAC_MC, 197 edac_printk(KERN_DEBUG, EDAC_MC,
198 "pci-read, sdram scrub control value: %d \n", scrubval); 198 "pci-read, sdram scrub control value: %d \n", scrubval);
199 199
200 for (i = 0; ARRAY_SIZE(scrubrates); i++) { 200 for (i = 0; i < ARRAY_SIZE(scrubrates); i++) {
201 if (scrubrates[i].scrubval == scrubval) { 201 if (scrubrates[i].scrubval == scrubval) {
202 *bw = scrubrates[i].bandwidth; 202 *bw = scrubrates[i].bandwidth;
203 status = 0; 203 status = 0;
@@ -1700,11 +1700,14 @@ static void f10_map_sysaddr_to_csrow(struct mem_ctl_info *mci,
1700 */ 1700 */
1701static void amd64_debug_display_dimm_sizes(int ctrl, struct amd64_pvt *pvt) 1701static void amd64_debug_display_dimm_sizes(int ctrl, struct amd64_pvt *pvt)
1702{ 1702{
1703 int dimm, size0, size1; 1703 int dimm, size0, size1, factor = 0;
1704 u32 dbam; 1704 u32 dbam;
1705 u32 *dcsb; 1705 u32 *dcsb;
1706 1706
1707 if (boot_cpu_data.x86 == 0xf) { 1707 if (boot_cpu_data.x86 == 0xf) {
1708 if (pvt->dclr0 & F10_WIDTH_128)
1709 factor = 1;
1710
1708 /* K8 families < revF not supported yet */ 1711 /* K8 families < revF not supported yet */
1709 if (pvt->ext_model < K8_REV_F) 1712 if (pvt->ext_model < K8_REV_F)
1710 return; 1713 return;
@@ -1732,7 +1735,8 @@ static void amd64_debug_display_dimm_sizes(int ctrl, struct amd64_pvt *pvt)
1732 size1 = pvt->ops->dbam_to_cs(pvt, DBAM_DIMM(dimm, dbam)); 1735 size1 = pvt->ops->dbam_to_cs(pvt, DBAM_DIMM(dimm, dbam));
1733 1736
1734 edac_printk(KERN_DEBUG, EDAC_MC, " %d: %5dMB %d: %5dMB\n", 1737 edac_printk(KERN_DEBUG, EDAC_MC, " %d: %5dMB %d: %5dMB\n",
1735 dimm * 2, size0, dimm * 2 + 1, size1); 1738 dimm * 2, size0 << factor,
1739 dimm * 2 + 1, size1 << factor);
1736 } 1740 }
1737} 1741}
1738 1742
@@ -2345,7 +2349,7 @@ static void amd64_read_mc_registers(struct amd64_pvt *pvt)
2345 amd64_read_pci_cfg(pvt->dram_f2_ctl, F10_DCLR_0, &pvt->dclr0); 2349 amd64_read_pci_cfg(pvt->dram_f2_ctl, F10_DCLR_0, &pvt->dclr0);
2346 amd64_read_pci_cfg(pvt->dram_f2_ctl, F10_DCHR_0, &pvt->dchr0); 2350 amd64_read_pci_cfg(pvt->dram_f2_ctl, F10_DCHR_0, &pvt->dchr0);
2347 2351
2348 if (!dct_ganging_enabled(pvt)) { 2352 if (!dct_ganging_enabled(pvt) && boot_cpu_data.x86 >= 0x10) {
2349 amd64_read_pci_cfg(pvt->dram_f2_ctl, F10_DCLR_1, &pvt->dclr1); 2353 amd64_read_pci_cfg(pvt->dram_f2_ctl, F10_DCLR_1, &pvt->dclr1);
2350 amd64_read_pci_cfg(pvt->dram_f2_ctl, F10_DCHR_1, &pvt->dchr1); 2354 amd64_read_pci_cfg(pvt->dram_f2_ctl, F10_DCHR_1, &pvt->dchr1);
2351 } 2355 }
@@ -2686,9 +2690,8 @@ static int amd64_check_ecc_enabled(struct amd64_pvt *pvt)
2686 amd64_printk(KERN_WARNING, "%s", ecc_warning); 2690 amd64_printk(KERN_WARNING, "%s", ecc_warning);
2687 return -ENODEV; 2691 return -ENODEV;
2688 } 2692 }
2689 } else
2690 /* CLEAR the override, since BIOS controlled it */
2691 ecc_enable_override = 0; 2693 ecc_enable_override = 0;
2694 }
2692 2695
2693 return 0; 2696 return 0;
2694} 2697}
@@ -2925,16 +2928,15 @@ static void __devexit amd64_remove_one_instance(struct pci_dev *pdev)
2925 2928
2926 amd64_free_mc_sibling_devices(pvt); 2929 amd64_free_mc_sibling_devices(pvt);
2927 2930
2928 kfree(pvt);
2929 mci->pvt_info = NULL;
2930
2931 mci_lookup[pvt->mc_node_id] = NULL;
2932
2933 /* unregister from EDAC MCE */ 2931 /* unregister from EDAC MCE */
2934 amd_report_gart_errors(false); 2932 amd_report_gart_errors(false);
2935 amd_unregister_ecc_decoder(amd64_decode_bus_error); 2933 amd_unregister_ecc_decoder(amd64_decode_bus_error);
2936 2934
2937 /* Free the EDAC CORE resources */ 2935 /* Free the EDAC CORE resources */
2936 mci->pvt_info = NULL;
2937 mci_lookup[pvt->mc_node_id] = NULL;
2938
2939 kfree(pvt);
2938 edac_mc_free(mci); 2940 edac_mc_free(mci);
2939} 2941}
2940 2942
@@ -3011,25 +3013,29 @@ static void amd64_setup_pci_device(void)
3011static int __init amd64_edac_init(void) 3013static int __init amd64_edac_init(void)
3012{ 3014{
3013 int nb, err = -ENODEV; 3015 int nb, err = -ENODEV;
3016 bool load_ok = false;
3014 3017
3015 edac_printk(KERN_INFO, EDAC_MOD_STR, EDAC_AMD64_VERSION "\n"); 3018 edac_printk(KERN_INFO, EDAC_MOD_STR, EDAC_AMD64_VERSION "\n");
3016 3019
3017 opstate_init(); 3020 opstate_init();
3018 3021
3019 if (cache_k8_northbridges() < 0) 3022 if (cache_k8_northbridges() < 0)
3020 return err; 3023 goto err_ret;
3021 3024
3022 msrs = msrs_alloc(); 3025 msrs = msrs_alloc();
3026 if (!msrs)
3027 goto err_ret;
3023 3028
3024 err = pci_register_driver(&amd64_pci_driver); 3029 err = pci_register_driver(&amd64_pci_driver);
3025 if (err) 3030 if (err)
3026 return err; 3031 goto err_pci;
3027 3032
3028 /* 3033 /*
3029 * At this point, the array 'pvt_lookup[]' contains pointers to alloc'd 3034 * At this point, the array 'pvt_lookup[]' contains pointers to alloc'd
3030 * amd64_pvt structs. These will be used in the 2nd stage init function 3035 * amd64_pvt structs. These will be used in the 2nd stage init function
3031 * to finish initialization of the MC instances. 3036 * to finish initialization of the MC instances.
3032 */ 3037 */
3038 err = -ENODEV;
3033 for (nb = 0; nb < num_k8_northbridges; nb++) { 3039 for (nb = 0; nb < num_k8_northbridges; nb++) {
3034 if (!pvt_lookup[nb]) 3040 if (!pvt_lookup[nb])
3035 continue; 3041 continue;
@@ -3037,16 +3043,21 @@ static int __init amd64_edac_init(void)
3037 err = amd64_init_2nd_stage(pvt_lookup[nb]); 3043 err = amd64_init_2nd_stage(pvt_lookup[nb]);
3038 if (err) 3044 if (err)
3039 goto err_2nd_stage; 3045 goto err_2nd_stage;
3040 }
3041 3046
3042 amd64_setup_pci_device(); 3047 load_ok = true;
3048 }
3043 3049
3044 return 0; 3050 if (load_ok) {
3051 amd64_setup_pci_device();
3052 return 0;
3053 }
3045 3054
3046err_2nd_stage: 3055err_2nd_stage:
3047 debugf0("2nd stage failed\n");
3048 pci_unregister_driver(&amd64_pci_driver); 3056 pci_unregister_driver(&amd64_pci_driver);
3049 3057err_pci:
3058 msrs_free(msrs);
3059 msrs = NULL;
3060err_ret:
3050 return err; 3061 return err;
3051} 3062}
3052 3063