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-rw-r--r--drivers/dma/mv_xor.c15
-rw-r--r--drivers/dma/mv_xor.h1
2 files changed, 7 insertions, 9 deletions
diff --git a/drivers/dma/mv_xor.c b/drivers/dma/mv_xor.c
index fc983bf38438..ec741b4607e2 100644
--- a/drivers/dma/mv_xor.c
+++ b/drivers/dma/mv_xor.c
@@ -603,7 +603,7 @@ static int mv_xor_alloc_chan_resources(struct dma_chan *chan)
603 int idx; 603 int idx;
604 struct mv_xor_chan *mv_chan = to_mv_xor_chan(chan); 604 struct mv_xor_chan *mv_chan = to_mv_xor_chan(chan);
605 struct mv_xor_desc_slot *slot = NULL; 605 struct mv_xor_desc_slot *slot = NULL;
606 int num_descs_in_pool = mv_chan->pool_size/MV_XOR_SLOT_SIZE; 606 int num_descs_in_pool = MV_XOR_POOL_SIZE/MV_XOR_SLOT_SIZE;
607 607
608 /* Allocate descriptor slots */ 608 /* Allocate descriptor slots */
609 idx = mv_chan->slots_allocated; 609 idx = mv_chan->slots_allocated;
@@ -1074,7 +1074,7 @@ static int mv_xor_channel_remove(struct mv_xor_chan *mv_chan)
1074 1074
1075 dma_async_device_unregister(&mv_chan->dmadev); 1075 dma_async_device_unregister(&mv_chan->dmadev);
1076 1076
1077 dma_free_coherent(dev, mv_chan->pool_size, 1077 dma_free_coherent(dev, MV_XOR_POOL_SIZE,
1078 mv_chan->dma_desc_pool_virt, mv_chan->dma_desc_pool); 1078 mv_chan->dma_desc_pool_virt, mv_chan->dma_desc_pool);
1079 1079
1080 list_for_each_entry_safe(chan, _chan, &mv_chan->dmadev.channels, 1080 list_for_each_entry_safe(chan, _chan, &mv_chan->dmadev.channels,
@@ -1088,8 +1088,7 @@ static int mv_xor_channel_remove(struct mv_xor_chan *mv_chan)
1088static struct mv_xor_chan * 1088static struct mv_xor_chan *
1089mv_xor_channel_add(struct mv_xor_device *xordev, 1089mv_xor_channel_add(struct mv_xor_device *xordev,
1090 struct platform_device *pdev, 1090 struct platform_device *pdev,
1091 int idx, dma_cap_mask_t cap_mask, 1091 int idx, dma_cap_mask_t cap_mask, int irq)
1092 size_t pool_size, int irq)
1093{ 1092{
1094 int ret = 0; 1093 int ret = 0;
1095 struct mv_xor_chan *mv_chan; 1094 struct mv_xor_chan *mv_chan;
@@ -1109,9 +1108,8 @@ mv_xor_channel_add(struct mv_xor_device *xordev,
1109 * note: writecombine gives slightly better performance, but 1108 * note: writecombine gives slightly better performance, but
1110 * requires that we explicitly flush the writes 1109 * requires that we explicitly flush the writes
1111 */ 1110 */
1112 mv_chan->pool_size = pool_size;
1113 mv_chan->dma_desc_pool_virt = 1111 mv_chan->dma_desc_pool_virt =
1114 dma_alloc_writecombine(&pdev->dev, mv_chan->pool_size, 1112 dma_alloc_writecombine(&pdev->dev, MV_XOR_POOL_SIZE,
1115 &mv_chan->dma_desc_pool, GFP_KERNEL); 1113 &mv_chan->dma_desc_pool, GFP_KERNEL);
1116 if (!mv_chan->dma_desc_pool_virt) 1114 if (!mv_chan->dma_desc_pool_virt)
1117 return ERR_PTR(-ENOMEM); 1115 return ERR_PTR(-ENOMEM);
@@ -1193,7 +1191,7 @@ mv_xor_channel_add(struct mv_xor_device *xordev,
1193 return mv_chan; 1191 return mv_chan;
1194 1192
1195 err_free_dma: 1193 err_free_dma:
1196 dma_free_coherent(&pdev->dev, pool_size, 1194 dma_free_coherent(&pdev->dev, MV_XOR_POOL_SIZE,
1197 mv_chan->dma_desc_pool_virt, mv_chan->dma_desc_pool); 1195 mv_chan->dma_desc_pool_virt, mv_chan->dma_desc_pool);
1198 return ERR_PTR(ret); 1196 return ERR_PTR(ret);
1199} 1197}
@@ -1296,8 +1294,7 @@ static int mv_xor_probe(struct platform_device *pdev)
1296 1294
1297 xordev->channels[i] = 1295 xordev->channels[i] =
1298 mv_xor_channel_add(xordev, pdev, i, 1296 mv_xor_channel_add(xordev, pdev, i,
1299 cd->cap_mask, 1297 cd->cap_mask, irq);
1300 cd->pool_size, irq);
1301 if (IS_ERR(xordev->channels[i])) { 1298 if (IS_ERR(xordev->channels[i])) {
1302 ret = PTR_ERR(xordev->channels[i]); 1299 ret = PTR_ERR(xordev->channels[i]);
1303 goto err_channel_add; 1300 goto err_channel_add;
diff --git a/drivers/dma/mv_xor.h b/drivers/dma/mv_xor.h
index dab9f30e564a..698b4487b348 100644
--- a/drivers/dma/mv_xor.h
+++ b/drivers/dma/mv_xor.h
@@ -24,6 +24,7 @@
24#include <linux/interrupt.h> 24#include <linux/interrupt.h>
25 25
26#define USE_TIMER 26#define USE_TIMER
27#define MV_XOR_POOL_SIZE PAGE_SIZE
27#define MV_XOR_SLOT_SIZE 64 28#define MV_XOR_SLOT_SIZE 64
28#define MV_XOR_THRESHOLD 1 29#define MV_XOR_THRESHOLD 1
29#define MV_XOR_MAX_CHANNELS 2 30#define MV_XOR_MAX_CHANNELS 2