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-rw-r--r--drivers/dma/dw_dmac.c31
1 files changed, 17 insertions, 14 deletions
diff --git a/drivers/dma/dw_dmac.c b/drivers/dma/dw_dmac.c
index db22754be35d..a4cf2614085a 100644
--- a/drivers/dma/dw_dmac.c
+++ b/drivers/dma/dw_dmac.c
@@ -32,15 +32,18 @@
32 * which does not support descriptor writeback. 32 * which does not support descriptor writeback.
33 */ 33 */
34 34
35/* NOTE: DMS+SMS is system-specific. We should get this information 35#define DWC_DEFAULT_CTLLO(private) ({ \
36 * from the platform code somehow. 36 struct dw_dma_slave *__slave = (private); \
37 */ 37 int dms = __slave ? __slave->dst_master : 0; \
38#define DWC_DEFAULT_CTLLO (DWC_CTLL_DST_MSIZE(0) \ 38 int sms = __slave ? __slave->src_master : 1; \
39 | DWC_CTLL_SRC_MSIZE(0) \ 39 \
40 | DWC_CTLL_DMS(0) \ 40 (DWC_CTLL_DST_MSIZE(0) \
41 | DWC_CTLL_SMS(1) \ 41 | DWC_CTLL_SRC_MSIZE(0) \
42 | DWC_CTLL_LLP_D_EN \ 42 | DWC_CTLL_LLP_D_EN \
43 | DWC_CTLL_LLP_S_EN) 43 | DWC_CTLL_LLP_S_EN \
44 | DWC_CTLL_DMS(dms) \
45 | DWC_CTLL_SMS(sms)); \
46 })
44 47
45/* 48/*
46 * This is configuration-dependent and usually a funny size like 4095. 49 * This is configuration-dependent and usually a funny size like 4095.
@@ -591,7 +594,7 @@ dwc_prep_dma_memcpy(struct dma_chan *chan, dma_addr_t dest, dma_addr_t src,
591 else 594 else
592 src_width = dst_width = 0; 595 src_width = dst_width = 0;
593 596
594 ctllo = DWC_DEFAULT_CTLLO 597 ctllo = DWC_DEFAULT_CTLLO(chan->private)
595 | DWC_CTLL_DST_WIDTH(dst_width) 598 | DWC_CTLL_DST_WIDTH(dst_width)
596 | DWC_CTLL_SRC_WIDTH(src_width) 599 | DWC_CTLL_SRC_WIDTH(src_width)
597 | DWC_CTLL_DST_INC 600 | DWC_CTLL_DST_INC
@@ -672,7 +675,7 @@ dwc_prep_slave_sg(struct dma_chan *chan, struct scatterlist *sgl,
672 675
673 switch (direction) { 676 switch (direction) {
674 case DMA_TO_DEVICE: 677 case DMA_TO_DEVICE:
675 ctllo = (DWC_DEFAULT_CTLLO 678 ctllo = (DWC_DEFAULT_CTLLO(chan->private)
676 | DWC_CTLL_DST_WIDTH(reg_width) 679 | DWC_CTLL_DST_WIDTH(reg_width)
677 | DWC_CTLL_DST_FIX 680 | DWC_CTLL_DST_FIX
678 | DWC_CTLL_SRC_INC 681 | DWC_CTLL_SRC_INC
@@ -717,7 +720,7 @@ dwc_prep_slave_sg(struct dma_chan *chan, struct scatterlist *sgl,
717 } 720 }
718 break; 721 break;
719 case DMA_FROM_DEVICE: 722 case DMA_FROM_DEVICE:
720 ctllo = (DWC_DEFAULT_CTLLO 723 ctllo = (DWC_DEFAULT_CTLLO(chan->private)
721 | DWC_CTLL_SRC_WIDTH(reg_width) 724 | DWC_CTLL_SRC_WIDTH(reg_width)
722 | DWC_CTLL_DST_INC 725 | DWC_CTLL_DST_INC
723 | DWC_CTLL_SRC_FIX 726 | DWC_CTLL_SRC_FIX
@@ -1129,7 +1132,7 @@ struct dw_cyclic_desc *dw_dma_cyclic_prep(struct dma_chan *chan,
1129 case DMA_TO_DEVICE: 1132 case DMA_TO_DEVICE:
1130 desc->lli.dar = dws->tx_reg; 1133 desc->lli.dar = dws->tx_reg;
1131 desc->lli.sar = buf_addr + (period_len * i); 1134 desc->lli.sar = buf_addr + (period_len * i);
1132 desc->lli.ctllo = (DWC_DEFAULT_CTLLO 1135 desc->lli.ctllo = (DWC_DEFAULT_CTLLO(chan->private)
1133 | DWC_CTLL_DST_WIDTH(reg_width) 1136 | DWC_CTLL_DST_WIDTH(reg_width)
1134 | DWC_CTLL_SRC_WIDTH(reg_width) 1137 | DWC_CTLL_SRC_WIDTH(reg_width)
1135 | DWC_CTLL_DST_FIX 1138 | DWC_CTLL_DST_FIX
@@ -1140,7 +1143,7 @@ struct dw_cyclic_desc *dw_dma_cyclic_prep(struct dma_chan *chan,
1140 case DMA_FROM_DEVICE: 1143 case DMA_FROM_DEVICE:
1141 desc->lli.dar = buf_addr + (period_len * i); 1144 desc->lli.dar = buf_addr + (period_len * i);
1142 desc->lli.sar = dws->rx_reg; 1145 desc->lli.sar = dws->rx_reg;
1143 desc->lli.ctllo = (DWC_DEFAULT_CTLLO 1146 desc->lli.ctllo = (DWC_DEFAULT_CTLLO(chan->private)
1144 | DWC_CTLL_SRC_WIDTH(reg_width) 1147 | DWC_CTLL_SRC_WIDTH(reg_width)
1145 | DWC_CTLL_DST_WIDTH(reg_width) 1148 | DWC_CTLL_DST_WIDTH(reg_width)
1146 | DWC_CTLL_DST_INC 1149 | DWC_CTLL_DST_INC