diff options
Diffstat (limited to 'drivers/dma/ioatdma_registers.h')
-rw-r--r-- | drivers/dma/ioatdma_registers.h | 6 |
1 files changed, 5 insertions, 1 deletions
diff --git a/drivers/dma/ioatdma_registers.h b/drivers/dma/ioatdma_registers.h index a30c7349075a..baaab5ea146a 100644 --- a/drivers/dma/ioatdma_registers.h +++ b/drivers/dma/ioatdma_registers.h | |||
@@ -1,5 +1,5 @@ | |||
1 | /* | 1 | /* |
2 | * Copyright(c) 2004 - 2006 Intel Corporation. All rights reserved. | 2 | * Copyright(c) 2004 - 2007 Intel Corporation. All rights reserved. |
3 | * | 3 | * |
4 | * This program is free software; you can redistribute it and/or modify it | 4 | * This program is free software; you can redistribute it and/or modify it |
5 | * under the terms of the GNU General Public License as published by the Free | 5 | * under the terms of the GNU General Public License as published by the Free |
@@ -21,6 +21,9 @@ | |||
21 | #ifndef _IOAT_REGISTERS_H_ | 21 | #ifndef _IOAT_REGISTERS_H_ |
22 | #define _IOAT_REGISTERS_H_ | 22 | #define _IOAT_REGISTERS_H_ |
23 | 23 | ||
24 | #define IOAT_PCI_DMACTRL_OFFSET 0x48 | ||
25 | #define IOAT_PCI_DMACTRL_DMA_EN 0x00000001 | ||
26 | #define IOAT_PCI_DMACTRL_MSI_EN 0x00000002 | ||
24 | 27 | ||
25 | /* MMIO Device Registers */ | 28 | /* MMIO Device Registers */ |
26 | #define IOAT_CHANCNT_OFFSET 0x00 /* 8-bit */ | 29 | #define IOAT_CHANCNT_OFFSET 0x00 /* 8-bit */ |
@@ -39,6 +42,7 @@ | |||
39 | #define IOAT_INTRCTRL_MASTER_INT_EN 0x01 /* Master Interrupt Enable */ | 42 | #define IOAT_INTRCTRL_MASTER_INT_EN 0x01 /* Master Interrupt Enable */ |
40 | #define IOAT_INTRCTRL_INT_STATUS 0x02 /* ATTNSTATUS -or- Channel Int */ | 43 | #define IOAT_INTRCTRL_INT_STATUS 0x02 /* ATTNSTATUS -or- Channel Int */ |
41 | #define IOAT_INTRCTRL_INT 0x04 /* INT_STATUS -and- MASTER_INT_EN */ | 44 | #define IOAT_INTRCTRL_INT 0x04 /* INT_STATUS -and- MASTER_INT_EN */ |
45 | #define IOAT_INTRCTRL_MSIX_VECTOR_CONTROL 0x08 /* Enable all MSI-X vectors */ | ||
42 | 46 | ||
43 | #define IOAT_ATTNSTATUS_OFFSET 0x04 /* Each bit is a channel */ | 47 | #define IOAT_ATTNSTATUS_OFFSET 0x04 /* Each bit is a channel */ |
44 | 48 | ||