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path: root/drivers/dma/ioat/dma_v2.c
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Diffstat (limited to 'drivers/dma/ioat/dma_v2.c')
-rw-r--r--drivers/dma/ioat/dma_v2.c25
1 files changed, 24 insertions, 1 deletions
diff --git a/drivers/dma/ioat/dma_v2.c b/drivers/dma/ioat/dma_v2.c
index 49ba1c73d95e..58881860f400 100644
--- a/drivers/dma/ioat/dma_v2.c
+++ b/drivers/dma/ioat/dma_v2.c
@@ -54,7 +54,9 @@ static void __ioat2_issue_pending(struct ioat2_dma_chan *ioat)
54 /* make descriptor updates globally visible before notifying channel */ 54 /* make descriptor updates globally visible before notifying channel */
55 wmb(); 55 wmb();
56 writew(ioat->dmacount, reg_base + IOAT_CHAN_DMACOUNT_OFFSET); 56 writew(ioat->dmacount, reg_base + IOAT_CHAN_DMACOUNT_OFFSET);
57 57 dev_dbg(to_dev(&ioat->base),
58 "%s: head: %#x tail: %#x issued: %#x count: %#x\n",
59 __func__, ioat->head, ioat->tail, ioat->issued, ioat->dmacount);
58} 60}
59 61
60static void ioat2_issue_pending(struct dma_chan *chan) 62static void ioat2_issue_pending(struct dma_chan *chan)
@@ -101,6 +103,8 @@ static void __ioat2_start_null_desc(struct ioat2_dma_chan *ioat)
101 return; 103 return;
102 } 104 }
103 105
106 dev_dbg(to_dev(&ioat->base), "%s: head: %#x tail: %#x issued: %#x\n",
107 __func__, ioat->head, ioat->tail, ioat->issued);
104 idx = ioat2_desc_alloc(ioat, 1); 108 idx = ioat2_desc_alloc(ioat, 1);
105 desc = ioat2_get_ring_ent(ioat, idx); 109 desc = ioat2_get_ring_ent(ioat, idx);
106 110
@@ -118,6 +122,7 @@ static void __ioat2_start_null_desc(struct ioat2_dma_chan *ioat)
118 reg_base + IOAT2_CHAINADDR_OFFSET_LOW); 122 reg_base + IOAT2_CHAINADDR_OFFSET_LOW);
119 writel(((u64) desc->txd.phys) >> 32, 123 writel(((u64) desc->txd.phys) >> 32,
120 reg_base + IOAT2_CHAINADDR_OFFSET_HIGH); 124 reg_base + IOAT2_CHAINADDR_OFFSET_HIGH);
125 dump_desc_dbg(ioat, desc);
121 __ioat2_issue_pending(ioat); 126 __ioat2_issue_pending(ioat);
122} 127}
123 128
@@ -154,6 +159,10 @@ static void ioat2_reset_part2(struct work_struct *work)
154 ioat->issued = ioat->tail; 159 ioat->issued = ioat->tail;
155 ioat->dmacount = 0; 160 ioat->dmacount = 0;
156 161
162 dev_dbg(to_dev(&ioat->base),
163 "%s: head: %#x tail: %#x issued: %#x count: %#x\n",
164 __func__, ioat->head, ioat->tail, ioat->issued, ioat->dmacount);
165
157 if (ioat2_ring_pending(ioat)) { 166 if (ioat2_ring_pending(ioat)) {
158 struct ioat_ring_ent *desc; 167 struct ioat_ring_ent *desc;
159 168
@@ -221,6 +230,8 @@ static void ioat2_chan_watchdog(struct work_struct *work)
221 u16 active; 230 u16 active;
222 int i; 231 int i;
223 232
233 dev_dbg(&device->pdev->dev, "%s\n", __func__);
234
224 for (i = 0; i < device->common.chancnt; i++) { 235 for (i = 0; i < device->common.chancnt; i++) {
225 chan = ioat_chan_by_index(device, i); 236 chan = ioat_chan_by_index(device, i);
226 ioat = container_of(chan, struct ioat2_dma_chan, base); 237 ioat = container_of(chan, struct ioat2_dma_chan, base);
@@ -295,11 +306,15 @@ static void ioat2_cleanup(struct ioat2_dma_chan *ioat)
295 306
296 spin_lock_bh(&ioat->ring_lock); 307 spin_lock_bh(&ioat->ring_lock);
297 308
309 dev_dbg(to_dev(chan), "%s: head: %#x tail: %#x issued: %#x\n",
310 __func__, ioat->head, ioat->tail, ioat->issued);
311
298 active = ioat2_ring_active(ioat); 312 active = ioat2_ring_active(ioat);
299 for (i = 0; i < active && !seen_current; i++) { 313 for (i = 0; i < active && !seen_current; i++) {
300 prefetch(ioat2_get_ring_ent(ioat, ioat->tail + i + 1)); 314 prefetch(ioat2_get_ring_ent(ioat, ioat->tail + i + 1));
301 desc = ioat2_get_ring_ent(ioat, ioat->tail + i); 315 desc = ioat2_get_ring_ent(ioat, ioat->tail + i);
302 tx = &desc->txd; 316 tx = &desc->txd;
317 dump_desc_dbg(ioat, desc);
303 if (tx->cookie) { 318 if (tx->cookie) {
304 ioat_dma_unmap(chan, tx->flags, desc->len, desc->hw); 319 ioat_dma_unmap(chan, tx->flags, desc->len, desc->hw);
305 chan->completed_cookie = tx->cookie; 320 chan->completed_cookie = tx->cookie;
@@ -348,6 +363,7 @@ static int ioat2_enumerate_channels(struct ioatdma_device *device)
348 xfercap_log = readb(device->reg_base + IOAT_XFERCAP_OFFSET); 363 xfercap_log = readb(device->reg_base + IOAT_XFERCAP_OFFSET);
349 if (xfercap_log == 0) 364 if (xfercap_log == 0)
350 return 0; 365 return 0;
366 dev_dbg(dev, "%s: xfercap = %d\n", __func__, 1 << xfercap_log);
351 367
352 /* FIXME which i/oat version is i7300? */ 368 /* FIXME which i/oat version is i7300? */
353#ifdef CONFIG_I7300_IDLE_IOAT_CHANNEL 369#ifdef CONFIG_I7300_IDLE_IOAT_CHANNEL
@@ -381,6 +397,8 @@ static dma_cookie_t ioat2_tx_submit_unlock(struct dma_async_tx_descriptor *tx)
381 cookie = 1; 397 cookie = 1;
382 tx->cookie = cookie; 398 tx->cookie = cookie;
383 c->cookie = cookie; 399 c->cookie = cookie;
400 dev_dbg(to_dev(&ioat->base), "%s: cookie: %d\n", __func__, cookie);
401
384 ioat2_update_pending(ioat); 402 ioat2_update_pending(ioat);
385 spin_unlock_bh(&ioat->ring_lock); 403 spin_unlock_bh(&ioat->ring_lock);
386 404
@@ -480,6 +498,7 @@ static int ioat2_alloc_chan_resources(struct dma_chan *c)
480 kfree(ring); 498 kfree(ring);
481 return -ENOMEM; 499 return -ENOMEM;
482 } 500 }
501 set_desc_id(ring[i], i);
483 } 502 }
484 503
485 /* link descs */ 504 /* link descs */
@@ -571,12 +590,14 @@ ioat2_dma_prep_memcpy_lock(struct dma_chan *c, dma_addr_t dma_dest,
571 len -= copy; 590 len -= copy;
572 dst += copy; 591 dst += copy;
573 src += copy; 592 src += copy;
593 dump_desc_dbg(ioat, desc);
574 } 594 }
575 595
576 desc->txd.flags = flags; 596 desc->txd.flags = flags;
577 desc->len = total_len; 597 desc->len = total_len;
578 hw->ctl_f.int_en = !!(flags & DMA_PREP_INTERRUPT); 598 hw->ctl_f.int_en = !!(flags & DMA_PREP_INTERRUPT);
579 hw->ctl_f.compl_write = 1; 599 hw->ctl_f.compl_write = 1;
600 dump_desc_dbg(ioat, desc);
580 /* we leave the channel locked to ensure in order submission */ 601 /* we leave the channel locked to ensure in order submission */
581 602
582 return &desc->txd; 603 return &desc->txd;
@@ -614,6 +635,7 @@ static void ioat2_free_chan_resources(struct dma_chan *c)
614 635
615 spin_lock_bh(&ioat->ring_lock); 636 spin_lock_bh(&ioat->ring_lock);
616 descs = ioat2_ring_space(ioat); 637 descs = ioat2_ring_space(ioat);
638 dev_dbg(to_dev(chan), "freeing %d idle descriptors\n", descs);
617 for (i = 0; i < descs; i++) { 639 for (i = 0; i < descs; i++) {
618 desc = ioat2_get_ring_ent(ioat, ioat->head + i); 640 desc = ioat2_get_ring_ent(ioat, ioat->head + i);
619 ioat2_free_ring_ent(desc, c); 641 ioat2_free_ring_ent(desc, c);
@@ -625,6 +647,7 @@ static void ioat2_free_chan_resources(struct dma_chan *c)
625 647
626 for (i = 0; i < total_descs - descs; i++) { 648 for (i = 0; i < total_descs - descs; i++) {
627 desc = ioat2_get_ring_ent(ioat, ioat->tail + i); 649 desc = ioat2_get_ring_ent(ioat, ioat->tail + i);
650 dump_desc_dbg(ioat, desc);
628 ioat2_free_ring_ent(desc, c); 651 ioat2_free_ring_ent(desc, c);
629 } 652 }
630 653