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path: root/drivers/dma/imx-dma.c
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Diffstat (limited to 'drivers/dma/imx-dma.c')
-rw-r--r--drivers/dma/imx-dma.c10
1 files changed, 5 insertions, 5 deletions
diff --git a/drivers/dma/imx-dma.c b/drivers/dma/imx-dma.c
index d746899f36e1..678cd01dc42c 100644
--- a/drivers/dma/imx-dma.c
+++ b/drivers/dma/imx-dma.c
@@ -106,7 +106,7 @@ static int imxdma_control(struct dma_chan *chan, enum dma_ctrl_cmd cmd,
106 imx_dma_disable(imxdmac->imxdma_channel); 106 imx_dma_disable(imxdmac->imxdma_channel);
107 return 0; 107 return 0;
108 case DMA_SLAVE_CONFIG: 108 case DMA_SLAVE_CONFIG:
109 if (dmaengine_cfg->direction == DMA_FROM_DEVICE) { 109 if (dmaengine_cfg->direction == DMA_DEV_TO_MEM) {
110 imxdmac->per_address = dmaengine_cfg->src_addr; 110 imxdmac->per_address = dmaengine_cfg->src_addr;
111 imxdmac->watermark_level = dmaengine_cfg->src_maxburst; 111 imxdmac->watermark_level = dmaengine_cfg->src_maxburst;
112 imxdmac->word_size = dmaengine_cfg->src_addr_width; 112 imxdmac->word_size = dmaengine_cfg->src_addr_width;
@@ -223,7 +223,7 @@ static void imxdma_free_chan_resources(struct dma_chan *chan)
223 223
224static struct dma_async_tx_descriptor *imxdma_prep_slave_sg( 224static struct dma_async_tx_descriptor *imxdma_prep_slave_sg(
225 struct dma_chan *chan, struct scatterlist *sgl, 225 struct dma_chan *chan, struct scatterlist *sgl,
226 unsigned int sg_len, enum dma_data_direction direction, 226 unsigned int sg_len, enum dma_transfer_direction direction,
227 unsigned long flags) 227 unsigned long flags)
228{ 228{
229 struct imxdma_channel *imxdmac = to_imxdma_chan(chan); 229 struct imxdma_channel *imxdmac = to_imxdma_chan(chan);
@@ -240,7 +240,7 @@ static struct dma_async_tx_descriptor *imxdma_prep_slave_sg(
240 dma_length += sg->length; 240 dma_length += sg->length;
241 } 241 }
242 242
243 if (direction == DMA_FROM_DEVICE) 243 if (direction == DMA_DEV_TO_MEM)
244 dmamode = DMA_MODE_READ; 244 dmamode = DMA_MODE_READ;
245 else 245 else
246 dmamode = DMA_MODE_WRITE; 246 dmamode = DMA_MODE_WRITE;
@@ -270,7 +270,7 @@ static struct dma_async_tx_descriptor *imxdma_prep_slave_sg(
270 270
271static struct dma_async_tx_descriptor *imxdma_prep_dma_cyclic( 271static struct dma_async_tx_descriptor *imxdma_prep_dma_cyclic(
272 struct dma_chan *chan, dma_addr_t dma_addr, size_t buf_len, 272 struct dma_chan *chan, dma_addr_t dma_addr, size_t buf_len,
273 size_t period_len, enum dma_data_direction direction) 273 size_t period_len, enum dma_transfer_direction direction)
274{ 274{
275 struct imxdma_channel *imxdmac = to_imxdma_chan(chan); 275 struct imxdma_channel *imxdmac = to_imxdma_chan(chan);
276 struct imxdma_engine *imxdma = imxdmac->imxdma; 276 struct imxdma_engine *imxdma = imxdmac->imxdma;
@@ -316,7 +316,7 @@ static struct dma_async_tx_descriptor *imxdma_prep_dma_cyclic(
316 imxdmac->sg_list[periods].page_link = 316 imxdmac->sg_list[periods].page_link =
317 ((unsigned long)imxdmac->sg_list | 0x01) & ~0x02; 317 ((unsigned long)imxdmac->sg_list | 0x01) & ~0x02;
318 318
319 if (direction == DMA_FROM_DEVICE) 319 if (direction == DMA_DEV_TO_MEM)
320 dmamode = DMA_MODE_READ; 320 dmamode = DMA_MODE_READ;
321 else 321 else
322 dmamode = DMA_MODE_WRITE; 322 dmamode = DMA_MODE_WRITE;