diff options
Diffstat (limited to 'drivers/dma/at_hdmac.c')
| -rw-r--r-- | drivers/dma/at_hdmac.c | 15 |
1 files changed, 7 insertions, 8 deletions
diff --git a/drivers/dma/at_hdmac.c b/drivers/dma/at_hdmac.c index bf0d7e4e345b..7292aa87b2dd 100644 --- a/drivers/dma/at_hdmac.c +++ b/drivers/dma/at_hdmac.c | |||
| @@ -39,7 +39,6 @@ | |||
| 39 | */ | 39 | */ |
| 40 | 40 | ||
| 41 | #define ATC_DEFAULT_CFG (ATC_FIFOCFG_HALFFIFO) | 41 | #define ATC_DEFAULT_CFG (ATC_FIFOCFG_HALFFIFO) |
| 42 | #define ATC_DEFAULT_CTRLA (0) | ||
| 43 | #define ATC_DEFAULT_CTRLB (ATC_SIF(AT_DMA_MEM_IF) \ | 42 | #define ATC_DEFAULT_CTRLB (ATC_SIF(AT_DMA_MEM_IF) \ |
| 44 | |ATC_DIF(AT_DMA_MEM_IF)) | 43 | |ATC_DIF(AT_DMA_MEM_IF)) |
| 45 | 44 | ||
| @@ -574,7 +573,6 @@ atc_prep_dma_memcpy(struct dma_chan *chan, dma_addr_t dest, dma_addr_t src, | |||
| 574 | return NULL; | 573 | return NULL; |
| 575 | } | 574 | } |
| 576 | 575 | ||
| 577 | ctrla = ATC_DEFAULT_CTRLA; | ||
| 578 | ctrlb = ATC_DEFAULT_CTRLB | ATC_IEN | 576 | ctrlb = ATC_DEFAULT_CTRLB | ATC_IEN |
| 579 | | ATC_SRC_ADDR_MODE_INCR | 577 | | ATC_SRC_ADDR_MODE_INCR |
| 580 | | ATC_DST_ADDR_MODE_INCR | 578 | | ATC_DST_ADDR_MODE_INCR |
| @@ -585,13 +583,13 @@ atc_prep_dma_memcpy(struct dma_chan *chan, dma_addr_t dest, dma_addr_t src, | |||
| 585 | * of the most common optimization. | 583 | * of the most common optimization. |
| 586 | */ | 584 | */ |
| 587 | if (!((src | dest | len) & 3)) { | 585 | if (!((src | dest | len) & 3)) { |
| 588 | ctrla |= ATC_SRC_WIDTH_WORD | ATC_DST_WIDTH_WORD; | 586 | ctrla = ATC_SRC_WIDTH_WORD | ATC_DST_WIDTH_WORD; |
| 589 | src_width = dst_width = 2; | 587 | src_width = dst_width = 2; |
| 590 | } else if (!((src | dest | len) & 1)) { | 588 | } else if (!((src | dest | len) & 1)) { |
| 591 | ctrla |= ATC_SRC_WIDTH_HALFWORD | ATC_DST_WIDTH_HALFWORD; | 589 | ctrla = ATC_SRC_WIDTH_HALFWORD | ATC_DST_WIDTH_HALFWORD; |
| 592 | src_width = dst_width = 1; | 590 | src_width = dst_width = 1; |
| 593 | } else { | 591 | } else { |
| 594 | ctrla |= ATC_SRC_WIDTH_BYTE | ATC_DST_WIDTH_BYTE; | 592 | ctrla = ATC_SRC_WIDTH_BYTE | ATC_DST_WIDTH_BYTE; |
| 595 | src_width = dst_width = 0; | 593 | src_width = dst_width = 0; |
| 596 | } | 594 | } |
| 597 | 595 | ||
| @@ -668,7 +666,8 @@ atc_prep_slave_sg(struct dma_chan *chan, struct scatterlist *sgl, | |||
| 668 | return NULL; | 666 | return NULL; |
| 669 | } | 667 | } |
| 670 | 668 | ||
| 671 | ctrla = ATC_DEFAULT_CTRLA | atslave->ctrla; | 669 | ctrla = ATC_SCSIZE(sconfig->src_maxburst) |
| 670 | | ATC_DCSIZE(sconfig->dst_maxburst); | ||
| 672 | ctrlb = ATC_IEN; | 671 | ctrlb = ATC_IEN; |
| 673 | 672 | ||
| 674 | switch (direction) { | 673 | switch (direction) { |
| @@ -796,12 +795,12 @@ atc_dma_cyclic_fill_desc(struct dma_chan *chan, struct at_desc *desc, | |||
| 796 | enum dma_transfer_direction direction) | 795 | enum dma_transfer_direction direction) |
| 797 | { | 796 | { |
| 798 | struct at_dma_chan *atchan = to_at_dma_chan(chan); | 797 | struct at_dma_chan *atchan = to_at_dma_chan(chan); |
| 799 | struct at_dma_slave *atslave = chan->private; | ||
| 800 | struct dma_slave_config *sconfig = &atchan->dma_sconfig; | 798 | struct dma_slave_config *sconfig = &atchan->dma_sconfig; |
| 801 | u32 ctrla; | 799 | u32 ctrla; |
| 802 | 800 | ||
| 803 | /* prepare common CRTLA value */ | 801 | /* prepare common CRTLA value */ |
| 804 | ctrla = ATC_DEFAULT_CTRLA | atslave->ctrla | 802 | ctrla = ATC_SCSIZE(sconfig->src_maxburst) |
| 803 | | ATC_DCSIZE(sconfig->dst_maxburst) | ||
| 805 | | ATC_DST_WIDTH(reg_width) | 804 | | ATC_DST_WIDTH(reg_width) |
| 806 | | ATC_SRC_WIDTH(reg_width) | 805 | | ATC_SRC_WIDTH(reg_width) |
| 807 | | period_len >> reg_width; | 806 | | period_len >> reg_width; |
