diff options
Diffstat (limited to 'drivers/dma/amba-pl08x.c')
-rw-r--r-- | drivers/dma/amba-pl08x.c | 41 |
1 files changed, 22 insertions, 19 deletions
diff --git a/drivers/dma/amba-pl08x.c b/drivers/dma/amba-pl08x.c index 0698695e8bf9..8a281584458b 100644 --- a/drivers/dma/amba-pl08x.c +++ b/drivers/dma/amba-pl08x.c | |||
@@ -854,8 +854,10 @@ static int prep_phy_channel(struct pl08x_dma_chan *plchan, | |||
854 | int ret; | 854 | int ret; |
855 | 855 | ||
856 | /* Check if we already have a channel */ | 856 | /* Check if we already have a channel */ |
857 | if (plchan->phychan) | 857 | if (plchan->phychan) { |
858 | return 0; | 858 | ch = plchan->phychan; |
859 | goto got_channel; | ||
860 | } | ||
859 | 861 | ||
860 | ch = pl08x_get_phy_channel(pl08x, plchan); | 862 | ch = pl08x_get_phy_channel(pl08x, plchan); |
861 | if (!ch) { | 863 | if (!ch) { |
@@ -880,21 +882,22 @@ static int prep_phy_channel(struct pl08x_dma_chan *plchan, | |||
880 | return -EBUSY; | 882 | return -EBUSY; |
881 | } | 883 | } |
882 | ch->signal = ret; | 884 | ch->signal = ret; |
883 | |||
884 | /* Assign the flow control signal to this channel */ | ||
885 | if (txd->direction == DMA_TO_DEVICE) | ||
886 | txd->ccfg |= ch->signal << PL080_CONFIG_DST_SEL_SHIFT; | ||
887 | else if (txd->direction == DMA_FROM_DEVICE) | ||
888 | txd->ccfg |= ch->signal << PL080_CONFIG_SRC_SEL_SHIFT; | ||
889 | } | 885 | } |
890 | 886 | ||
887 | plchan->phychan = ch; | ||
891 | dev_dbg(&pl08x->adev->dev, "allocated physical channel %d and signal %d for xfer on %s\n", | 888 | dev_dbg(&pl08x->adev->dev, "allocated physical channel %d and signal %d for xfer on %s\n", |
892 | ch->id, | 889 | ch->id, |
893 | ch->signal, | 890 | ch->signal, |
894 | plchan->name); | 891 | plchan->name); |
895 | 892 | ||
893 | got_channel: | ||
894 | /* Assign the flow control signal to this channel */ | ||
895 | if (txd->direction == DMA_MEM_TO_DEV) | ||
896 | txd->ccfg |= ch->signal << PL080_CONFIG_DST_SEL_SHIFT; | ||
897 | else if (txd->direction == DMA_DEV_TO_MEM) | ||
898 | txd->ccfg |= ch->signal << PL080_CONFIG_SRC_SEL_SHIFT; | ||
899 | |||
896 | plchan->phychan_hold++; | 900 | plchan->phychan_hold++; |
897 | plchan->phychan = ch; | ||
898 | 901 | ||
899 | return 0; | 902 | return 0; |
900 | } | 903 | } |
@@ -1102,10 +1105,10 @@ static int dma_set_runtime_config(struct dma_chan *chan, | |||
1102 | 1105 | ||
1103 | /* Transfer direction */ | 1106 | /* Transfer direction */ |
1104 | plchan->runtime_direction = config->direction; | 1107 | plchan->runtime_direction = config->direction; |
1105 | if (config->direction == DMA_TO_DEVICE) { | 1108 | if (config->direction == DMA_MEM_TO_DEV) { |
1106 | addr_width = config->dst_addr_width; | 1109 | addr_width = config->dst_addr_width; |
1107 | maxburst = config->dst_maxburst; | 1110 | maxburst = config->dst_maxburst; |
1108 | } else if (config->direction == DMA_FROM_DEVICE) { | 1111 | } else if (config->direction == DMA_DEV_TO_MEM) { |
1109 | addr_width = config->src_addr_width; | 1112 | addr_width = config->src_addr_width; |
1110 | maxburst = config->src_maxburst; | 1113 | maxburst = config->src_maxburst; |
1111 | } else { | 1114 | } else { |
@@ -1136,7 +1139,7 @@ static int dma_set_runtime_config(struct dma_chan *chan, | |||
1136 | cctl |= burst << PL080_CONTROL_SB_SIZE_SHIFT; | 1139 | cctl |= burst << PL080_CONTROL_SB_SIZE_SHIFT; |
1137 | cctl |= burst << PL080_CONTROL_DB_SIZE_SHIFT; | 1140 | cctl |= burst << PL080_CONTROL_DB_SIZE_SHIFT; |
1138 | 1141 | ||
1139 | if (plchan->runtime_direction == DMA_FROM_DEVICE) { | 1142 | if (plchan->runtime_direction == DMA_DEV_TO_MEM) { |
1140 | plchan->src_addr = config->src_addr; | 1143 | plchan->src_addr = config->src_addr; |
1141 | plchan->src_cctl = pl08x_cctl(cctl) | PL080_CONTROL_DST_INCR | | 1144 | plchan->src_cctl = pl08x_cctl(cctl) | PL080_CONTROL_DST_INCR | |
1142 | pl08x_select_bus(plchan->cd->periph_buses, | 1145 | pl08x_select_bus(plchan->cd->periph_buses, |
@@ -1152,7 +1155,7 @@ static int dma_set_runtime_config(struct dma_chan *chan, | |||
1152 | "configured channel %s (%s) for %s, data width %d, " | 1155 | "configured channel %s (%s) for %s, data width %d, " |
1153 | "maxburst %d words, LE, CCTL=0x%08x\n", | 1156 | "maxburst %d words, LE, CCTL=0x%08x\n", |
1154 | dma_chan_name(chan), plchan->name, | 1157 | dma_chan_name(chan), plchan->name, |
1155 | (config->direction == DMA_FROM_DEVICE) ? "RX" : "TX", | 1158 | (config->direction == DMA_DEV_TO_MEM) ? "RX" : "TX", |
1156 | addr_width, | 1159 | addr_width, |
1157 | maxburst, | 1160 | maxburst, |
1158 | cctl); | 1161 | cctl); |
@@ -1322,7 +1325,7 @@ static struct dma_async_tx_descriptor *pl08x_prep_dma_memcpy( | |||
1322 | 1325 | ||
1323 | static struct dma_async_tx_descriptor *pl08x_prep_slave_sg( | 1326 | static struct dma_async_tx_descriptor *pl08x_prep_slave_sg( |
1324 | struct dma_chan *chan, struct scatterlist *sgl, | 1327 | struct dma_chan *chan, struct scatterlist *sgl, |
1325 | unsigned int sg_len, enum dma_data_direction direction, | 1328 | unsigned int sg_len, enum dma_transfer_direction direction, |
1326 | unsigned long flags) | 1329 | unsigned long flags) |
1327 | { | 1330 | { |
1328 | struct pl08x_dma_chan *plchan = to_pl08x_chan(chan); | 1331 | struct pl08x_dma_chan *plchan = to_pl08x_chan(chan); |
@@ -1354,10 +1357,10 @@ static struct dma_async_tx_descriptor *pl08x_prep_slave_sg( | |||
1354 | */ | 1357 | */ |
1355 | txd->direction = direction; | 1358 | txd->direction = direction; |
1356 | 1359 | ||
1357 | if (direction == DMA_TO_DEVICE) { | 1360 | if (direction == DMA_MEM_TO_DEV) { |
1358 | txd->cctl = plchan->dst_cctl; | 1361 | txd->cctl = plchan->dst_cctl; |
1359 | slave_addr = plchan->dst_addr; | 1362 | slave_addr = plchan->dst_addr; |
1360 | } else if (direction == DMA_FROM_DEVICE) { | 1363 | } else if (direction == DMA_DEV_TO_MEM) { |
1361 | txd->cctl = plchan->src_cctl; | 1364 | txd->cctl = plchan->src_cctl; |
1362 | slave_addr = plchan->src_addr; | 1365 | slave_addr = plchan->src_addr; |
1363 | } else { | 1366 | } else { |
@@ -1368,10 +1371,10 @@ static struct dma_async_tx_descriptor *pl08x_prep_slave_sg( | |||
1368 | } | 1371 | } |
1369 | 1372 | ||
1370 | if (plchan->cd->device_fc) | 1373 | if (plchan->cd->device_fc) |
1371 | tmp = (direction == DMA_TO_DEVICE) ? PL080_FLOW_MEM2PER_PER : | 1374 | tmp = (direction == DMA_MEM_TO_DEV) ? PL080_FLOW_MEM2PER_PER : |
1372 | PL080_FLOW_PER2MEM_PER; | 1375 | PL080_FLOW_PER2MEM_PER; |
1373 | else | 1376 | else |
1374 | tmp = (direction == DMA_TO_DEVICE) ? PL080_FLOW_MEM2PER : | 1377 | tmp = (direction == DMA_MEM_TO_DEV) ? PL080_FLOW_MEM2PER : |
1375 | PL080_FLOW_PER2MEM; | 1378 | PL080_FLOW_PER2MEM; |
1376 | 1379 | ||
1377 | txd->ccfg |= tmp << PL080_CONFIG_FLOW_CONTROL_SHIFT; | 1380 | txd->ccfg |= tmp << PL080_CONFIG_FLOW_CONTROL_SHIFT; |
@@ -1387,7 +1390,7 @@ static struct dma_async_tx_descriptor *pl08x_prep_slave_sg( | |||
1387 | list_add_tail(&dsg->node, &txd->dsg_list); | 1390 | list_add_tail(&dsg->node, &txd->dsg_list); |
1388 | 1391 | ||
1389 | dsg->len = sg_dma_len(sg); | 1392 | dsg->len = sg_dma_len(sg); |
1390 | if (direction == DMA_TO_DEVICE) { | 1393 | if (direction == DMA_MEM_TO_DEV) { |
1391 | dsg->src_addr = sg_phys(sg); | 1394 | dsg->src_addr = sg_phys(sg); |
1392 | dsg->dst_addr = slave_addr; | 1395 | dsg->dst_addr = slave_addr; |
1393 | } else { | 1396 | } else { |