aboutsummaryrefslogtreecommitdiffstats
path: root/drivers/crypto
diff options
context:
space:
mode:
Diffstat (limited to 'drivers/crypto')
-rw-r--r--drivers/crypto/bfin_crc.c43
1 files changed, 23 insertions, 20 deletions
diff --git a/drivers/crypto/bfin_crc.c b/drivers/crypto/bfin_crc.c
index ce9a831a6c70..b099e33cb073 100644
--- a/drivers/crypto/bfin_crc.c
+++ b/drivers/crypto/bfin_crc.c
@@ -29,7 +29,6 @@
29#include <crypto/hash.h> 29#include <crypto/hash.h>
30#include <crypto/internal/hash.h> 30#include <crypto/internal/hash.h>
31 31
32#include <asm/blackfin.h>
33#include <asm/dma.h> 32#include <asm/dma.h>
34#include <asm/portmux.h> 33#include <asm/portmux.h>
35#include <asm/io.h> 34#include <asm/io.h>
@@ -62,6 +61,7 @@ struct bfin_crypto_crc {
62 struct dma_desc_array *sg_cpu; /* virt addr of sg dma descriptors */ 61 struct dma_desc_array *sg_cpu; /* virt addr of sg dma descriptors */
63 dma_addr_t sg_dma; /* phy addr of sg dma descriptors */ 62 dma_addr_t sg_dma; /* phy addr of sg dma descriptors */
64 u8 *sg_mid_buf; 63 u8 *sg_mid_buf;
64 dma_addr_t sg_mid_dma; /* phy addr of sg mid buffer */
65 65
66 struct tasklet_struct done_task; 66 struct tasklet_struct done_task;
67 struct crypto_queue queue; /* waiting requests */ 67 struct crypto_queue queue; /* waiting requests */
@@ -196,7 +196,6 @@ static void bfin_crypto_crc_config_dma(struct bfin_crypto_crc *crc)
196 dma_map_sg(crc->dev, ctx->sg, ctx->sg_nents, DMA_TO_DEVICE); 196 dma_map_sg(crc->dev, ctx->sg, ctx->sg_nents, DMA_TO_DEVICE);
197 197
198 for_each_sg(ctx->sg, sg, ctx->sg_nents, j) { 198 for_each_sg(ctx->sg, sg, ctx->sg_nents, j) {
199 dma_config = DMAFLOW_ARRAY | RESTART | NDSIZE_3 | DMAEN | PSIZE_32;
200 dma_addr = sg_dma_address(sg); 199 dma_addr = sg_dma_address(sg);
201 /* deduce extra bytes in last sg */ 200 /* deduce extra bytes in last sg */
202 if (sg_is_last(sg)) 201 if (sg_is_last(sg))
@@ -209,12 +208,29 @@ static void bfin_crypto_crc_config_dma(struct bfin_crypto_crc *crc)
209 bytes in current sg buffer. Move addr of current 208 bytes in current sg buffer. Move addr of current
210 sg and deduce the length of current sg. 209 sg and deduce the length of current sg.
211 */ 210 */
212 memcpy(crc->sg_mid_buf +((i-1) << 2) + mid_dma_count, 211 memcpy(crc->sg_mid_buf +(i << 2) + mid_dma_count,
213 (void *)dma_addr, 212 sg_virt(sg),
214 CHKSUM_DIGEST_SIZE - mid_dma_count); 213 CHKSUM_DIGEST_SIZE - mid_dma_count);
215 dma_addr += CHKSUM_DIGEST_SIZE - mid_dma_count; 214 dma_addr += CHKSUM_DIGEST_SIZE - mid_dma_count;
216 dma_count -= CHKSUM_DIGEST_SIZE - mid_dma_count; 215 dma_count -= CHKSUM_DIGEST_SIZE - mid_dma_count;
216
217 dma_config = DMAFLOW_ARRAY | RESTART | NDSIZE_3 |
218 DMAEN | PSIZE_32 | WDSIZE_32;
219
220 /* setup new dma descriptor for next middle dma */
221 crc->sg_cpu[i].start_addr = crc->sg_mid_dma + (i << 2);
222 crc->sg_cpu[i].cfg = dma_config;
223 crc->sg_cpu[i].x_count = 1;
224 crc->sg_cpu[i].x_modify = CHKSUM_DIGEST_SIZE;
225 dev_dbg(crc->dev, "%d: crc_dma: start_addr:0x%lx, "
226 "cfg:0x%lx, x_count:0x%lx, x_modify:0x%lx\n",
227 i, crc->sg_cpu[i].start_addr,
228 crc->sg_cpu[i].cfg, crc->sg_cpu[i].x_count,
229 crc->sg_cpu[i].x_modify);
230 i++;
217 } 231 }
232
233 dma_config = DMAFLOW_ARRAY | RESTART | NDSIZE_3 | DMAEN | PSIZE_32;
218 /* chop current sg dma len to multiple of 32 bits */ 234 /* chop current sg dma len to multiple of 32 bits */
219 mid_dma_count = dma_count % 4; 235 mid_dma_count = dma_count % 4;
220 dma_count &= ~0x3; 236 dma_count &= ~0x3;
@@ -245,24 +261,9 @@ static void bfin_crypto_crc_config_dma(struct bfin_crypto_crc *crc)
245 261
246 if (mid_dma_count) { 262 if (mid_dma_count) {
247 /* copy extra bytes to next middle dma buffer */ 263 /* copy extra bytes to next middle dma buffer */
248 dma_config = DMAFLOW_ARRAY | RESTART | NDSIZE_3 |
249 DMAEN | PSIZE_32 | WDSIZE_32;
250 memcpy(crc->sg_mid_buf + (i << 2), 264 memcpy(crc->sg_mid_buf + (i << 2),
251 (void *)(dma_addr + (dma_count << 2)), 265 (u8*)sg_virt(sg) + (dma_count << 2),
252 mid_dma_count); 266 mid_dma_count);
253 /* setup new dma descriptor for next middle dma */
254 crc->sg_cpu[i].start_addr = dma_map_single(crc->dev,
255 crc->sg_mid_buf + (i << 2),
256 CHKSUM_DIGEST_SIZE, DMA_TO_DEVICE);
257 crc->sg_cpu[i].cfg = dma_config;
258 crc->sg_cpu[i].x_count = 1;
259 crc->sg_cpu[i].x_modify = CHKSUM_DIGEST_SIZE;
260 dev_dbg(crc->dev, "%d: crc_dma: start_addr:0x%lx, "
261 "cfg:0x%lx, x_count:0x%lx, x_modify:0x%lx\n",
262 i, crc->sg_cpu[i].start_addr,
263 crc->sg_cpu[i].cfg, crc->sg_cpu[i].x_count,
264 crc->sg_cpu[i].x_modify);
265 i++;
266 } 267 }
267 } 268 }
268 269
@@ -654,6 +655,8 @@ static int bfin_crypto_crc_probe(struct platform_device *pdev)
654 * 1 last + 1 next dma descriptors 655 * 1 last + 1 next dma descriptors
655 */ 656 */
656 crc->sg_mid_buf = (u8 *)(crc->sg_cpu + ((CRC_MAX_DMA_DESC + 1) << 1)); 657 crc->sg_mid_buf = (u8 *)(crc->sg_cpu + ((CRC_MAX_DMA_DESC + 1) << 1));
658 crc->sg_mid_dma = crc->sg_dma + sizeof(struct dma_desc_array)
659 * ((CRC_MAX_DMA_DESC + 1) << 1);
657 660
658 writel(0, &crc->regs->control); 661 writel(0, &crc->regs->control);
659 crc->poly = (u32)pdev->dev.platform_data; 662 crc->poly = (u32)pdev->dev.platform_data;