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-rw-r--r--drivers/clocksource/Kconfig3
-rw-r--r--drivers/clocksource/time-efm32.c4
-rw-r--r--drivers/clocksource/timer-sun5i.c15
3 files changed, 9 insertions, 13 deletions
diff --git a/drivers/clocksource/Kconfig b/drivers/clocksource/Kconfig
index 68161f7a07d6..a0b036ccb118 100644
--- a/drivers/clocksource/Kconfig
+++ b/drivers/clocksource/Kconfig
@@ -192,6 +192,7 @@ config SYS_SUPPORTS_EM_STI
192config SH_TIMER_CMT 192config SH_TIMER_CMT
193 bool "Renesas CMT timer driver" if COMPILE_TEST 193 bool "Renesas CMT timer driver" if COMPILE_TEST
194 depends on GENERIC_CLOCKEVENTS 194 depends on GENERIC_CLOCKEVENTS
195 depends on HAS_IOMEM
195 default SYS_SUPPORTS_SH_CMT 196 default SYS_SUPPORTS_SH_CMT
196 help 197 help
197 This enables build of a clocksource and clockevent driver for 198 This enables build of a clocksource and clockevent driver for
@@ -201,6 +202,7 @@ config SH_TIMER_CMT
201config SH_TIMER_MTU2 202config SH_TIMER_MTU2
202 bool "Renesas MTU2 timer driver" if COMPILE_TEST 203 bool "Renesas MTU2 timer driver" if COMPILE_TEST
203 depends on GENERIC_CLOCKEVENTS 204 depends on GENERIC_CLOCKEVENTS
205 depends on HAS_IOMEM
204 default SYS_SUPPORTS_SH_MTU2 206 default SYS_SUPPORTS_SH_MTU2
205 help 207 help
206 This enables build of a clockevent driver for the Multi-Function 208 This enables build of a clockevent driver for the Multi-Function
@@ -210,6 +212,7 @@ config SH_TIMER_MTU2
210config SH_TIMER_TMU 212config SH_TIMER_TMU
211 bool "Renesas TMU timer driver" if COMPILE_TEST 213 bool "Renesas TMU timer driver" if COMPILE_TEST
212 depends on GENERIC_CLOCKEVENTS 214 depends on GENERIC_CLOCKEVENTS
215 depends on HAS_IOMEM
213 default SYS_SUPPORTS_SH_TMU 216 default SYS_SUPPORTS_SH_TMU
214 help 217 help
215 This enables build of a clocksource and clockevent driver for 218 This enables build of a clocksource and clockevent driver for
diff --git a/drivers/clocksource/time-efm32.c b/drivers/clocksource/time-efm32.c
index bba62f9deefb..ec57ba2bbd87 100644
--- a/drivers/clocksource/time-efm32.c
+++ b/drivers/clocksource/time-efm32.c
@@ -225,12 +225,12 @@ static int __init efm32_clockevent_init(struct device_node *np)
225 clock_event_ddata.base = base; 225 clock_event_ddata.base = base;
226 clock_event_ddata.periodic_top = DIV_ROUND_CLOSEST(rate, 1024 * HZ); 226 clock_event_ddata.periodic_top = DIV_ROUND_CLOSEST(rate, 1024 * HZ);
227 227
228 setup_irq(irq, &efm32_clock_event_irq);
229
230 clockevents_config_and_register(&clock_event_ddata.evtdev, 228 clockevents_config_and_register(&clock_event_ddata.evtdev,
231 DIV_ROUND_CLOSEST(rate, 1024), 229 DIV_ROUND_CLOSEST(rate, 1024),
232 0xf, 0xffff); 230 0xf, 0xffff);
233 231
232 setup_irq(irq, &efm32_clock_event_irq);
233
234 return 0; 234 return 0;
235 235
236err_get_irq: 236err_get_irq:
diff --git a/drivers/clocksource/timer-sun5i.c b/drivers/clocksource/timer-sun5i.c
index 02268448dc85..58597fbcc046 100644
--- a/drivers/clocksource/timer-sun5i.c
+++ b/drivers/clocksource/timer-sun5i.c
@@ -17,7 +17,6 @@
17#include <linux/irq.h> 17#include <linux/irq.h>
18#include <linux/irqreturn.h> 18#include <linux/irqreturn.h>
19#include <linux/reset.h> 19#include <linux/reset.h>
20#include <linux/sched_clock.h>
21#include <linux/of.h> 20#include <linux/of.h>
22#include <linux/of_address.h> 21#include <linux/of_address.h>
23#include <linux/of_irq.h> 22#include <linux/of_irq.h>
@@ -137,11 +136,6 @@ static struct irqaction sun5i_timer_irq = {
137 .dev_id = &sun5i_clockevent, 136 .dev_id = &sun5i_clockevent,
138}; 137};
139 138
140static u64 sun5i_timer_sched_read(void)
141{
142 return ~readl(timer_base + TIMER_CNTVAL_LO_REG(1));
143}
144
145static void __init sun5i_timer_init(struct device_node *node) 139static void __init sun5i_timer_init(struct device_node *node)
146{ 140{
147 struct reset_control *rstc; 141 struct reset_control *rstc;
@@ -172,16 +166,11 @@ static void __init sun5i_timer_init(struct device_node *node)
172 writel(TIMER_CTL_ENABLE | TIMER_CTL_RELOAD, 166 writel(TIMER_CTL_ENABLE | TIMER_CTL_RELOAD,
173 timer_base + TIMER_CTL_REG(1)); 167 timer_base + TIMER_CTL_REG(1));
174 168
175 sched_clock_register(sun5i_timer_sched_read, 32, rate);
176 clocksource_mmio_init(timer_base + TIMER_CNTVAL_LO_REG(1), node->name, 169 clocksource_mmio_init(timer_base + TIMER_CNTVAL_LO_REG(1), node->name,
177 rate, 340, 32, clocksource_mmio_readl_down); 170 rate, 340, 32, clocksource_mmio_readl_down);
178 171
179 ticks_per_jiffy = DIV_ROUND_UP(rate, HZ); 172 ticks_per_jiffy = DIV_ROUND_UP(rate, HZ);
180 173
181 ret = setup_irq(irq, &sun5i_timer_irq);
182 if (ret)
183 pr_warn("failed to setup irq %d\n", irq);
184
185 /* Enable timer0 interrupt */ 174 /* Enable timer0 interrupt */
186 val = readl(timer_base + TIMER_IRQ_EN_REG); 175 val = readl(timer_base + TIMER_IRQ_EN_REG);
187 writel(val | TIMER_IRQ_EN(0), timer_base + TIMER_IRQ_EN_REG); 176 writel(val | TIMER_IRQ_EN(0), timer_base + TIMER_IRQ_EN_REG);
@@ -191,6 +180,10 @@ static void __init sun5i_timer_init(struct device_node *node)
191 180
192 clockevents_config_and_register(&sun5i_clockevent, rate, 181 clockevents_config_and_register(&sun5i_clockevent, rate,
193 TIMER_SYNC_TICKS, 0xffffffff); 182 TIMER_SYNC_TICKS, 0xffffffff);
183
184 ret = setup_irq(irq, &sun5i_timer_irq);
185 if (ret)
186 pr_warn("failed to setup irq %d\n", irq);
194} 187}
195CLOCKSOURCE_OF_DECLARE(sun5i_a13, "allwinner,sun5i-a13-hstimer", 188CLOCKSOURCE_OF_DECLARE(sun5i_a13, "allwinner,sun5i-a13-hstimer",
196 sun5i_timer_init); 189 sun5i_timer_init);