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-rw-r--r--drivers/clocksource/acpi_pm.c12
-rw-r--r--drivers/clocksource/cyclone.c2
-rw-r--r--drivers/clocksource/scx200_hrt.c2
-rw-r--r--drivers/clocksource/tcb_clksrc.c2
4 files changed, 9 insertions, 9 deletions
diff --git a/drivers/clocksource/acpi_pm.c b/drivers/clocksource/acpi_pm.c
index ee19b6e8fcb4..40bd8c61c7d7 100644
--- a/drivers/clocksource/acpi_pm.c
+++ b/drivers/clocksource/acpi_pm.c
@@ -57,7 +57,7 @@ u32 acpi_pm_read_verified(void)
57 return v2; 57 return v2;
58} 58}
59 59
60static cycle_t acpi_pm_read(void) 60static cycle_t acpi_pm_read(struct clocksource *cs)
61{ 61{
62 return (cycle_t)read_pmtmr(); 62 return (cycle_t)read_pmtmr();
63} 63}
@@ -83,7 +83,7 @@ static int __init acpi_pm_good_setup(char *__str)
83} 83}
84__setup("acpi_pm_good", acpi_pm_good_setup); 84__setup("acpi_pm_good", acpi_pm_good_setup);
85 85
86static cycle_t acpi_pm_read_slow(void) 86static cycle_t acpi_pm_read_slow(struct clocksource *cs)
87{ 87{
88 return (cycle_t)acpi_pm_read_verified(); 88 return (cycle_t)acpi_pm_read_verified();
89} 89}
@@ -156,9 +156,9 @@ static int verify_pmtmr_rate(void)
156 unsigned long count, delta; 156 unsigned long count, delta;
157 157
158 mach_prepare_counter(); 158 mach_prepare_counter();
159 value1 = clocksource_acpi_pm.read(); 159 value1 = clocksource_acpi_pm.read(&clocksource_acpi_pm);
160 mach_countup(&count); 160 mach_countup(&count);
161 value2 = clocksource_acpi_pm.read(); 161 value2 = clocksource_acpi_pm.read(&clocksource_acpi_pm);
162 delta = (value2 - value1) & ACPI_PM_MASK; 162 delta = (value2 - value1) & ACPI_PM_MASK;
163 163
164 /* Check that the PMTMR delta is within 5% of what we expect */ 164 /* Check that the PMTMR delta is within 5% of what we expect */
@@ -195,9 +195,9 @@ static int __init init_acpi_pm_clocksource(void)
195 /* "verify" this timing source: */ 195 /* "verify" this timing source: */
196 for (j = 0; j < ACPI_PM_MONOTONICITY_CHECKS; j++) { 196 for (j = 0; j < ACPI_PM_MONOTONICITY_CHECKS; j++) {
197 udelay(100 * j); 197 udelay(100 * j);
198 value1 = clocksource_acpi_pm.read(); 198 value1 = clocksource_acpi_pm.read(&clocksource_acpi_pm);
199 for (i = 0; i < ACPI_PM_READ_CHECKS; i++) { 199 for (i = 0; i < ACPI_PM_READ_CHECKS; i++) {
200 value2 = clocksource_acpi_pm.read(); 200 value2 = clocksource_acpi_pm.read(&clocksource_acpi_pm);
201 if (value2 == value1) 201 if (value2 == value1)
202 continue; 202 continue;
203 if (value2 > value1) 203 if (value2 > value1)
diff --git a/drivers/clocksource/cyclone.c b/drivers/clocksource/cyclone.c
index 8615059a8729..64e528e8bfa6 100644
--- a/drivers/clocksource/cyclone.c
+++ b/drivers/clocksource/cyclone.c
@@ -19,7 +19,7 @@
19int use_cyclone = 0; 19int use_cyclone = 0;
20static void __iomem *cyclone_ptr; 20static void __iomem *cyclone_ptr;
21 21
22static cycle_t read_cyclone(void) 22static cycle_t read_cyclone(struct clocksource *cs)
23{ 23{
24 return (cycle_t)readl(cyclone_ptr); 24 return (cycle_t)readl(cyclone_ptr);
25} 25}
diff --git a/drivers/clocksource/scx200_hrt.c b/drivers/clocksource/scx200_hrt.c
index b92da677aa5d..27f4d9637b62 100644
--- a/drivers/clocksource/scx200_hrt.c
+++ b/drivers/clocksource/scx200_hrt.c
@@ -43,7 +43,7 @@ MODULE_PARM_DESC(ppm, "+-adjust to actual XO freq (ppm)");
43/* The base timer frequency, * 27 if selected */ 43/* The base timer frequency, * 27 if selected */
44#define HRT_FREQ 1000000 44#define HRT_FREQ 1000000
45 45
46static cycle_t read_hrt(void) 46static cycle_t read_hrt(struct clocksource *cs)
47{ 47{
48 /* Read the timer value */ 48 /* Read the timer value */
49 return (cycle_t) inl(scx200_cb_base + SCx200_TIMER_OFFSET); 49 return (cycle_t) inl(scx200_cb_base + SCx200_TIMER_OFFSET);
diff --git a/drivers/clocksource/tcb_clksrc.c b/drivers/clocksource/tcb_clksrc.c
index 254f1064d973..01b886e68822 100644
--- a/drivers/clocksource/tcb_clksrc.c
+++ b/drivers/clocksource/tcb_clksrc.c
@@ -39,7 +39,7 @@
39 39
40static void __iomem *tcaddr; 40static void __iomem *tcaddr;
41 41
42static cycle_t tc_get_cycles(void) 42static cycle_t tc_get_cycles(struct clocksource *cs)
43{ 43{
44 unsigned long flags; 44 unsigned long flags;
45 u32 lower, upper; 45 u32 lower, upper;