diff options
Diffstat (limited to 'drivers/clocksource')
-rw-r--r-- | drivers/clocksource/sh_cmt.c | 45 | ||||
-rw-r--r-- | drivers/clocksource/sh_mtu2.c | 37 | ||||
-rw-r--r-- | drivers/clocksource/sh_tmu.c | 41 |
3 files changed, 64 insertions, 59 deletions
diff --git a/drivers/clocksource/sh_cmt.c b/drivers/clocksource/sh_cmt.c index 744f748cc84b..f6677cb19789 100644 --- a/drivers/clocksource/sh_cmt.c +++ b/drivers/clocksource/sh_cmt.c | |||
@@ -150,13 +150,12 @@ static void sh_cmt_start_stop_ch(struct sh_cmt_priv *p, int start) | |||
150 | 150 | ||
151 | static int sh_cmt_enable(struct sh_cmt_priv *p, unsigned long *rate) | 151 | static int sh_cmt_enable(struct sh_cmt_priv *p, unsigned long *rate) |
152 | { | 152 | { |
153 | struct sh_timer_config *cfg = p->pdev->dev.platform_data; | ||
154 | int ret; | 153 | int ret; |
155 | 154 | ||
156 | /* enable clock */ | 155 | /* enable clock */ |
157 | ret = clk_enable(p->clk); | 156 | ret = clk_enable(p->clk); |
158 | if (ret) { | 157 | if (ret) { |
159 | pr_err("sh_cmt: cannot enable clock \"%s\"\n", cfg->clk); | 158 | dev_err(&p->pdev->dev, "cannot enable clock\n"); |
160 | return ret; | 159 | return ret; |
161 | } | 160 | } |
162 | 161 | ||
@@ -279,7 +278,7 @@ static void sh_cmt_clock_event_program_verify(struct sh_cmt_priv *p, | |||
279 | delay = 1; | 278 | delay = 1; |
280 | 279 | ||
281 | if (!delay) | 280 | if (!delay) |
282 | pr_warning("sh_cmt: too long delay\n"); | 281 | dev_warn(&p->pdev->dev, "too long delay\n"); |
283 | 282 | ||
284 | } while (delay); | 283 | } while (delay); |
285 | } | 284 | } |
@@ -289,7 +288,7 @@ static void sh_cmt_set_next(struct sh_cmt_priv *p, unsigned long delta) | |||
289 | unsigned long flags; | 288 | unsigned long flags; |
290 | 289 | ||
291 | if (delta > p->max_match_value) | 290 | if (delta > p->max_match_value) |
292 | pr_warning("sh_cmt: delta out of range\n"); | 291 | dev_warn(&p->pdev->dev, "delta out of range\n"); |
293 | 292 | ||
294 | spin_lock_irqsave(&p->lock, flags); | 293 | spin_lock_irqsave(&p->lock, flags); |
295 | p->next_match_value = delta; | 294 | p->next_match_value = delta; |
@@ -451,7 +450,7 @@ static int sh_cmt_register_clocksource(struct sh_cmt_priv *p, | |||
451 | cs->resume = sh_cmt_clocksource_resume; | 450 | cs->resume = sh_cmt_clocksource_resume; |
452 | cs->mask = CLOCKSOURCE_MASK(sizeof(unsigned long) * 8); | 451 | cs->mask = CLOCKSOURCE_MASK(sizeof(unsigned long) * 8); |
453 | cs->flags = CLOCK_SOURCE_IS_CONTINUOUS; | 452 | cs->flags = CLOCK_SOURCE_IS_CONTINUOUS; |
454 | pr_info("sh_cmt: %s used as clock source\n", cs->name); | 453 | dev_info(&p->pdev->dev, "used as clock source\n"); |
455 | clocksource_register(cs); | 454 | clocksource_register(cs); |
456 | return 0; | 455 | return 0; |
457 | } | 456 | } |
@@ -497,13 +496,11 @@ static void sh_cmt_clock_event_mode(enum clock_event_mode mode, | |||
497 | 496 | ||
498 | switch (mode) { | 497 | switch (mode) { |
499 | case CLOCK_EVT_MODE_PERIODIC: | 498 | case CLOCK_EVT_MODE_PERIODIC: |
500 | pr_info("sh_cmt: %s used for periodic clock events\n", | 499 | dev_info(&p->pdev->dev, "used for periodic clock events\n"); |
501 | ced->name); | ||
502 | sh_cmt_clock_event_start(p, 1); | 500 | sh_cmt_clock_event_start(p, 1); |
503 | break; | 501 | break; |
504 | case CLOCK_EVT_MODE_ONESHOT: | 502 | case CLOCK_EVT_MODE_ONESHOT: |
505 | pr_info("sh_cmt: %s used for oneshot clock events\n", | 503 | dev_info(&p->pdev->dev, "used for oneshot clock events\n"); |
506 | ced->name); | ||
507 | sh_cmt_clock_event_start(p, 0); | 504 | sh_cmt_clock_event_start(p, 0); |
508 | break; | 505 | break; |
509 | case CLOCK_EVT_MODE_SHUTDOWN: | 506 | case CLOCK_EVT_MODE_SHUTDOWN: |
@@ -544,7 +541,7 @@ static void sh_cmt_register_clockevent(struct sh_cmt_priv *p, | |||
544 | ced->set_next_event = sh_cmt_clock_event_next; | 541 | ced->set_next_event = sh_cmt_clock_event_next; |
545 | ced->set_mode = sh_cmt_clock_event_mode; | 542 | ced->set_mode = sh_cmt_clock_event_mode; |
546 | 543 | ||
547 | pr_info("sh_cmt: %s used for clock events\n", ced->name); | 544 | dev_info(&p->pdev->dev, "used for clock events\n"); |
548 | clockevents_register_device(ced); | 545 | clockevents_register_device(ced); |
549 | } | 546 | } |
550 | 547 | ||
@@ -601,22 +598,27 @@ static int sh_cmt_setup(struct sh_cmt_priv *p, struct platform_device *pdev) | |||
601 | /* map memory, let mapbase point to our channel */ | 598 | /* map memory, let mapbase point to our channel */ |
602 | p->mapbase = ioremap_nocache(res->start, resource_size(res)); | 599 | p->mapbase = ioremap_nocache(res->start, resource_size(res)); |
603 | if (p->mapbase == NULL) { | 600 | if (p->mapbase == NULL) { |
604 | pr_err("sh_cmt: failed to remap I/O memory\n"); | 601 | dev_err(&p->pdev->dev, "failed to remap I/O memory\n"); |
605 | goto err0; | 602 | goto err0; |
606 | } | 603 | } |
607 | 604 | ||
608 | /* request irq using setup_irq() (too early for request_irq()) */ | 605 | /* request irq using setup_irq() (too early for request_irq()) */ |
609 | p->irqaction.name = cfg->name; | 606 | p->irqaction.name = dev_name(&p->pdev->dev); |
610 | p->irqaction.handler = sh_cmt_interrupt; | 607 | p->irqaction.handler = sh_cmt_interrupt; |
611 | p->irqaction.dev_id = p; | 608 | p->irqaction.dev_id = p; |
612 | p->irqaction.flags = IRQF_DISABLED | IRQF_TIMER | IRQF_IRQPOLL; | 609 | p->irqaction.flags = IRQF_DISABLED | IRQF_TIMER | \ |
610 | IRQF_IRQPOLL | IRQF_NOBALANCING; | ||
613 | 611 | ||
614 | /* get hold of clock */ | 612 | /* get hold of clock */ |
615 | p->clk = clk_get(&p->pdev->dev, cfg->clk); | 613 | p->clk = clk_get(&p->pdev->dev, "cmt_fck"); |
616 | if (IS_ERR(p->clk)) { | 614 | if (IS_ERR(p->clk)) { |
617 | pr_err("sh_cmt: cannot get clock \"%s\"\n", cfg->clk); | 615 | dev_warn(&p->pdev->dev, "using deprecated clock lookup\n"); |
618 | ret = PTR_ERR(p->clk); | 616 | p->clk = clk_get(&p->pdev->dev, cfg->clk); |
619 | goto err1; | 617 | if (IS_ERR(p->clk)) { |
618 | dev_err(&p->pdev->dev, "cannot get clock\n"); | ||
619 | ret = PTR_ERR(p->clk); | ||
620 | goto err1; | ||
621 | } | ||
620 | } | 622 | } |
621 | 623 | ||
622 | if (resource_size(res) == 6) { | 624 | if (resource_size(res) == 6) { |
@@ -629,17 +631,17 @@ static int sh_cmt_setup(struct sh_cmt_priv *p, struct platform_device *pdev) | |||
629 | p->clear_bits = ~0xc000; | 631 | p->clear_bits = ~0xc000; |
630 | } | 632 | } |
631 | 633 | ||
632 | ret = sh_cmt_register(p, cfg->name, | 634 | ret = sh_cmt_register(p, (char *)dev_name(&p->pdev->dev), |
633 | cfg->clockevent_rating, | 635 | cfg->clockevent_rating, |
634 | cfg->clocksource_rating); | 636 | cfg->clocksource_rating); |
635 | if (ret) { | 637 | if (ret) { |
636 | pr_err("sh_cmt: registration failed\n"); | 638 | dev_err(&p->pdev->dev, "registration failed\n"); |
637 | goto err1; | 639 | goto err1; |
638 | } | 640 | } |
639 | 641 | ||
640 | ret = setup_irq(irq, &p->irqaction); | 642 | ret = setup_irq(irq, &p->irqaction); |
641 | if (ret) { | 643 | if (ret) { |
642 | pr_err("sh_cmt: failed to request irq %d\n", irq); | 644 | dev_err(&p->pdev->dev, "failed to request irq %d\n", irq); |
643 | goto err1; | 645 | goto err1; |
644 | } | 646 | } |
645 | 647 | ||
@@ -654,11 +656,10 @@ err0: | |||
654 | static int __devinit sh_cmt_probe(struct platform_device *pdev) | 656 | static int __devinit sh_cmt_probe(struct platform_device *pdev) |
655 | { | 657 | { |
656 | struct sh_cmt_priv *p = platform_get_drvdata(pdev); | 658 | struct sh_cmt_priv *p = platform_get_drvdata(pdev); |
657 | struct sh_timer_config *cfg = pdev->dev.platform_data; | ||
658 | int ret; | 659 | int ret; |
659 | 660 | ||
660 | if (p) { | 661 | if (p) { |
661 | pr_info("sh_cmt: %s kept as earlytimer\n", cfg->name); | 662 | dev_info(&pdev->dev, "kept as earlytimer\n"); |
662 | return 0; | 663 | return 0; |
663 | } | 664 | } |
664 | 665 | ||
diff --git a/drivers/clocksource/sh_mtu2.c b/drivers/clocksource/sh_mtu2.c index 5fb78bfd73bb..ef7a5be8a09f 100644 --- a/drivers/clocksource/sh_mtu2.c +++ b/drivers/clocksource/sh_mtu2.c | |||
@@ -119,13 +119,12 @@ static void sh_mtu2_start_stop_ch(struct sh_mtu2_priv *p, int start) | |||
119 | 119 | ||
120 | static int sh_mtu2_enable(struct sh_mtu2_priv *p) | 120 | static int sh_mtu2_enable(struct sh_mtu2_priv *p) |
121 | { | 121 | { |
122 | struct sh_timer_config *cfg = p->pdev->dev.platform_data; | ||
123 | int ret; | 122 | int ret; |
124 | 123 | ||
125 | /* enable clock */ | 124 | /* enable clock */ |
126 | ret = clk_enable(p->clk); | 125 | ret = clk_enable(p->clk); |
127 | if (ret) { | 126 | if (ret) { |
128 | pr_err("sh_mtu2: cannot enable clock \"%s\"\n", cfg->clk); | 127 | dev_err(&p->pdev->dev, "cannot enable clock\n"); |
129 | return ret; | 128 | return ret; |
130 | } | 129 | } |
131 | 130 | ||
@@ -194,8 +193,7 @@ static void sh_mtu2_clock_event_mode(enum clock_event_mode mode, | |||
194 | 193 | ||
195 | switch (mode) { | 194 | switch (mode) { |
196 | case CLOCK_EVT_MODE_PERIODIC: | 195 | case CLOCK_EVT_MODE_PERIODIC: |
197 | pr_info("sh_mtu2: %s used for periodic clock events\n", | 196 | dev_info(&p->pdev->dev, "used for periodic clock events\n"); |
198 | ced->name); | ||
199 | sh_mtu2_enable(p); | 197 | sh_mtu2_enable(p); |
200 | break; | 198 | break; |
201 | case CLOCK_EVT_MODE_UNUSED: | 199 | case CLOCK_EVT_MODE_UNUSED: |
@@ -222,13 +220,13 @@ static void sh_mtu2_register_clockevent(struct sh_mtu2_priv *p, | |||
222 | ced->cpumask = cpumask_of(0); | 220 | ced->cpumask = cpumask_of(0); |
223 | ced->set_mode = sh_mtu2_clock_event_mode; | 221 | ced->set_mode = sh_mtu2_clock_event_mode; |
224 | 222 | ||
225 | pr_info("sh_mtu2: %s used for clock events\n", ced->name); | 223 | dev_info(&p->pdev->dev, "used for clock events\n"); |
226 | clockevents_register_device(ced); | 224 | clockevents_register_device(ced); |
227 | 225 | ||
228 | ret = setup_irq(p->irqaction.irq, &p->irqaction); | 226 | ret = setup_irq(p->irqaction.irq, &p->irqaction); |
229 | if (ret) { | 227 | if (ret) { |
230 | pr_err("sh_mtu2: failed to request irq %d\n", | 228 | dev_err(&p->pdev->dev, "failed to request irq %d\n", |
231 | p->irqaction.irq); | 229 | p->irqaction.irq); |
232 | return; | 230 | return; |
233 | } | 231 | } |
234 | } | 232 | } |
@@ -274,26 +272,32 @@ static int sh_mtu2_setup(struct sh_mtu2_priv *p, struct platform_device *pdev) | |||
274 | /* map memory, let mapbase point to our channel */ | 272 | /* map memory, let mapbase point to our channel */ |
275 | p->mapbase = ioremap_nocache(res->start, resource_size(res)); | 273 | p->mapbase = ioremap_nocache(res->start, resource_size(res)); |
276 | if (p->mapbase == NULL) { | 274 | if (p->mapbase == NULL) { |
277 | pr_err("sh_mtu2: failed to remap I/O memory\n"); | 275 | dev_err(&p->pdev->dev, "failed to remap I/O memory\n"); |
278 | goto err0; | 276 | goto err0; |
279 | } | 277 | } |
280 | 278 | ||
281 | /* setup data for setup_irq() (too early for request_irq()) */ | 279 | /* setup data for setup_irq() (too early for request_irq()) */ |
282 | p->irqaction.name = cfg->name; | 280 | p->irqaction.name = dev_name(&p->pdev->dev); |
283 | p->irqaction.handler = sh_mtu2_interrupt; | 281 | p->irqaction.handler = sh_mtu2_interrupt; |
284 | p->irqaction.dev_id = p; | 282 | p->irqaction.dev_id = p; |
285 | p->irqaction.irq = irq; | 283 | p->irqaction.irq = irq; |
286 | p->irqaction.flags = IRQF_DISABLED | IRQF_TIMER | IRQF_IRQPOLL; | 284 | p->irqaction.flags = IRQF_DISABLED | IRQF_TIMER | \ |
285 | IRQF_IRQPOLL | IRQF_NOBALANCING; | ||
287 | 286 | ||
288 | /* get hold of clock */ | 287 | /* get hold of clock */ |
289 | p->clk = clk_get(&p->pdev->dev, cfg->clk); | 288 | p->clk = clk_get(&p->pdev->dev, "mtu2_fck"); |
290 | if (IS_ERR(p->clk)) { | 289 | if (IS_ERR(p->clk)) { |
291 | pr_err("sh_mtu2: cannot get clock \"%s\"\n", cfg->clk); | 290 | dev_warn(&p->pdev->dev, "using deprecated clock lookup\n"); |
292 | ret = PTR_ERR(p->clk); | 291 | p->clk = clk_get(&p->pdev->dev, cfg->clk); |
293 | goto err1; | 292 | if (IS_ERR(p->clk)) { |
293 | dev_err(&p->pdev->dev, "cannot get clock\n"); | ||
294 | ret = PTR_ERR(p->clk); | ||
295 | goto err1; | ||
296 | } | ||
294 | } | 297 | } |
295 | 298 | ||
296 | return sh_mtu2_register(p, cfg->name, cfg->clockevent_rating); | 299 | return sh_mtu2_register(p, (char *)dev_name(&p->pdev->dev), |
300 | cfg->clockevent_rating); | ||
297 | err1: | 301 | err1: |
298 | iounmap(p->mapbase); | 302 | iounmap(p->mapbase); |
299 | err0: | 303 | err0: |
@@ -303,11 +307,10 @@ static int sh_mtu2_setup(struct sh_mtu2_priv *p, struct platform_device *pdev) | |||
303 | static int __devinit sh_mtu2_probe(struct platform_device *pdev) | 307 | static int __devinit sh_mtu2_probe(struct platform_device *pdev) |
304 | { | 308 | { |
305 | struct sh_mtu2_priv *p = platform_get_drvdata(pdev); | 309 | struct sh_mtu2_priv *p = platform_get_drvdata(pdev); |
306 | struct sh_timer_config *cfg = pdev->dev.platform_data; | ||
307 | int ret; | 310 | int ret; |
308 | 311 | ||
309 | if (p) { | 312 | if (p) { |
310 | pr_info("sh_mtu2: %s kept as earlytimer\n", cfg->name); | 313 | dev_info(&pdev->dev, "kept as earlytimer\n"); |
311 | return 0; | 314 | return 0; |
312 | } | 315 | } |
313 | 316 | ||
diff --git a/drivers/clocksource/sh_tmu.c b/drivers/clocksource/sh_tmu.c index fc9ff1e5b770..8e44e14ec4c2 100644 --- a/drivers/clocksource/sh_tmu.c +++ b/drivers/clocksource/sh_tmu.c | |||
@@ -107,13 +107,12 @@ static void sh_tmu_start_stop_ch(struct sh_tmu_priv *p, int start) | |||
107 | 107 | ||
108 | static int sh_tmu_enable(struct sh_tmu_priv *p) | 108 | static int sh_tmu_enable(struct sh_tmu_priv *p) |
109 | { | 109 | { |
110 | struct sh_timer_config *cfg = p->pdev->dev.platform_data; | ||
111 | int ret; | 110 | int ret; |
112 | 111 | ||
113 | /* enable clock */ | 112 | /* enable clock */ |
114 | ret = clk_enable(p->clk); | 113 | ret = clk_enable(p->clk); |
115 | if (ret) { | 114 | if (ret) { |
116 | pr_err("sh_tmu: cannot enable clock \"%s\"\n", cfg->clk); | 115 | dev_err(&p->pdev->dev, "cannot enable clock\n"); |
117 | return ret; | 116 | return ret; |
118 | } | 117 | } |
119 | 118 | ||
@@ -229,7 +228,7 @@ static int sh_tmu_register_clocksource(struct sh_tmu_priv *p, | |||
229 | cs->disable = sh_tmu_clocksource_disable; | 228 | cs->disable = sh_tmu_clocksource_disable; |
230 | cs->mask = CLOCKSOURCE_MASK(32); | 229 | cs->mask = CLOCKSOURCE_MASK(32); |
231 | cs->flags = CLOCK_SOURCE_IS_CONTINUOUS; | 230 | cs->flags = CLOCK_SOURCE_IS_CONTINUOUS; |
232 | pr_info("sh_tmu: %s used as clock source\n", cs->name); | 231 | dev_info(&p->pdev->dev, "used as clock source\n"); |
233 | clocksource_register(cs); | 232 | clocksource_register(cs); |
234 | return 0; | 233 | return 0; |
235 | } | 234 | } |
@@ -277,13 +276,11 @@ static void sh_tmu_clock_event_mode(enum clock_event_mode mode, | |||
277 | 276 | ||
278 | switch (mode) { | 277 | switch (mode) { |
279 | case CLOCK_EVT_MODE_PERIODIC: | 278 | case CLOCK_EVT_MODE_PERIODIC: |
280 | pr_info("sh_tmu: %s used for periodic clock events\n", | 279 | dev_info(&p->pdev->dev, "used for periodic clock events\n"); |
281 | ced->name); | ||
282 | sh_tmu_clock_event_start(p, 1); | 280 | sh_tmu_clock_event_start(p, 1); |
283 | break; | 281 | break; |
284 | case CLOCK_EVT_MODE_ONESHOT: | 282 | case CLOCK_EVT_MODE_ONESHOT: |
285 | pr_info("sh_tmu: %s used for oneshot clock events\n", | 283 | dev_info(&p->pdev->dev, "used for oneshot clock events\n"); |
286 | ced->name); | ||
287 | sh_tmu_clock_event_start(p, 0); | 284 | sh_tmu_clock_event_start(p, 0); |
288 | break; | 285 | break; |
289 | case CLOCK_EVT_MODE_UNUSED: | 286 | case CLOCK_EVT_MODE_UNUSED: |
@@ -324,13 +321,13 @@ static void sh_tmu_register_clockevent(struct sh_tmu_priv *p, | |||
324 | ced->set_next_event = sh_tmu_clock_event_next; | 321 | ced->set_next_event = sh_tmu_clock_event_next; |
325 | ced->set_mode = sh_tmu_clock_event_mode; | 322 | ced->set_mode = sh_tmu_clock_event_mode; |
326 | 323 | ||
327 | pr_info("sh_tmu: %s used for clock events\n", ced->name); | 324 | dev_info(&p->pdev->dev, "used for clock events\n"); |
328 | clockevents_register_device(ced); | 325 | clockevents_register_device(ced); |
329 | 326 | ||
330 | ret = setup_irq(p->irqaction.irq, &p->irqaction); | 327 | ret = setup_irq(p->irqaction.irq, &p->irqaction); |
331 | if (ret) { | 328 | if (ret) { |
332 | pr_err("sh_tmu: failed to request irq %d\n", | 329 | dev_err(&p->pdev->dev, "failed to request irq %d\n", |
333 | p->irqaction.irq); | 330 | p->irqaction.irq); |
334 | return; | 331 | return; |
335 | } | 332 | } |
336 | } | 333 | } |
@@ -379,26 +376,31 @@ static int sh_tmu_setup(struct sh_tmu_priv *p, struct platform_device *pdev) | |||
379 | /* map memory, let mapbase point to our channel */ | 376 | /* map memory, let mapbase point to our channel */ |
380 | p->mapbase = ioremap_nocache(res->start, resource_size(res)); | 377 | p->mapbase = ioremap_nocache(res->start, resource_size(res)); |
381 | if (p->mapbase == NULL) { | 378 | if (p->mapbase == NULL) { |
382 | pr_err("sh_tmu: failed to remap I/O memory\n"); | 379 | dev_err(&p->pdev->dev, "failed to remap I/O memory\n"); |
383 | goto err0; | 380 | goto err0; |
384 | } | 381 | } |
385 | 382 | ||
386 | /* setup data for setup_irq() (too early for request_irq()) */ | 383 | /* setup data for setup_irq() (too early for request_irq()) */ |
387 | p->irqaction.name = cfg->name; | 384 | p->irqaction.name = dev_name(&p->pdev->dev); |
388 | p->irqaction.handler = sh_tmu_interrupt; | 385 | p->irqaction.handler = sh_tmu_interrupt; |
389 | p->irqaction.dev_id = p; | 386 | p->irqaction.dev_id = p; |
390 | p->irqaction.irq = irq; | 387 | p->irqaction.irq = irq; |
391 | p->irqaction.flags = IRQF_DISABLED | IRQF_TIMER | IRQF_IRQPOLL; | 388 | p->irqaction.flags = IRQF_DISABLED | IRQF_TIMER | \ |
389 | IRQF_IRQPOLL | IRQF_NOBALANCING; | ||
392 | 390 | ||
393 | /* get hold of clock */ | 391 | /* get hold of clock */ |
394 | p->clk = clk_get(&p->pdev->dev, cfg->clk); | 392 | p->clk = clk_get(&p->pdev->dev, "tmu_fck"); |
395 | if (IS_ERR(p->clk)) { | 393 | if (IS_ERR(p->clk)) { |
396 | pr_err("sh_tmu: cannot get clock \"%s\"\n", cfg->clk); | 394 | dev_warn(&p->pdev->dev, "using deprecated clock lookup\n"); |
397 | ret = PTR_ERR(p->clk); | 395 | p->clk = clk_get(&p->pdev->dev, cfg->clk); |
398 | goto err1; | 396 | if (IS_ERR(p->clk)) { |
397 | dev_err(&p->pdev->dev, "cannot get clock\n"); | ||
398 | ret = PTR_ERR(p->clk); | ||
399 | goto err1; | ||
400 | } | ||
399 | } | 401 | } |
400 | 402 | ||
401 | return sh_tmu_register(p, cfg->name, | 403 | return sh_tmu_register(p, (char *)dev_name(&p->pdev->dev), |
402 | cfg->clockevent_rating, | 404 | cfg->clockevent_rating, |
403 | cfg->clocksource_rating); | 405 | cfg->clocksource_rating); |
404 | err1: | 406 | err1: |
@@ -410,11 +412,10 @@ static int sh_tmu_setup(struct sh_tmu_priv *p, struct platform_device *pdev) | |||
410 | static int __devinit sh_tmu_probe(struct platform_device *pdev) | 412 | static int __devinit sh_tmu_probe(struct platform_device *pdev) |
411 | { | 413 | { |
412 | struct sh_tmu_priv *p = platform_get_drvdata(pdev); | 414 | struct sh_tmu_priv *p = platform_get_drvdata(pdev); |
413 | struct sh_timer_config *cfg = pdev->dev.platform_data; | ||
414 | int ret; | 415 | int ret; |
415 | 416 | ||
416 | if (p) { | 417 | if (p) { |
417 | pr_info("sh_tmu: %s kept as earlytimer\n", cfg->name); | 418 | dev_info(&pdev->dev, "kept as earlytimer\n"); |
418 | return 0; | 419 | return 0; |
419 | } | 420 | } |
420 | 421 | ||