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-rw-r--r--drivers/clocksource/clksrc-dbx500-prcmu.c11
1 files changed, 5 insertions, 6 deletions
diff --git a/drivers/clocksource/clksrc-dbx500-prcmu.c b/drivers/clocksource/clksrc-dbx500-prcmu.c
index 54f3d119d99c..77398f8c19a0 100644
--- a/drivers/clocksource/clksrc-dbx500-prcmu.c
+++ b/drivers/clocksource/clksrc-dbx500-prcmu.c
@@ -10,7 +10,7 @@
10 * DBx500-PRCMU Timer 10 * DBx500-PRCMU Timer
11 * The PRCMU has 5 timers which are available in a always-on 11 * The PRCMU has 5 timers which are available in a always-on
12 * power domain. We use the Timer 4 for our always-on clock 12 * power domain. We use the Timer 4 for our always-on clock
13 * source on DB8500 and Timer 3 on DB5500. 13 * source on DB8500.
14 */ 14 */
15#include <linux/clockchips.h> 15#include <linux/clockchips.h>
16#include <linux/clksrc-dbx500-prcmu.h> 16#include <linux/clksrc-dbx500-prcmu.h>
@@ -30,15 +30,14 @@
30 30
31static void __iomem *clksrc_dbx500_timer_base; 31static void __iomem *clksrc_dbx500_timer_base;
32 32
33static cycle_t clksrc_dbx500_prcmu_read(struct clocksource *cs) 33static cycle_t notrace clksrc_dbx500_prcmu_read(struct clocksource *cs)
34{ 34{
35 void __iomem *base = clksrc_dbx500_timer_base;
35 u32 count, count2; 36 u32 count, count2;
36 37
37 do { 38 do {
38 count = readl(clksrc_dbx500_timer_base + 39 count = readl_relaxed(base + PRCMU_TIMER_DOWNCOUNT);
39 PRCMU_TIMER_DOWNCOUNT); 40 count2 = readl_relaxed(base + PRCMU_TIMER_DOWNCOUNT);
40 count2 = readl(clksrc_dbx500_timer_base +
41 PRCMU_TIMER_DOWNCOUNT);
42 } while (count2 != count); 41 } while (count2 != count);
43 42
44 /* Negate because the timer is a decrementing counter */ 43 /* Negate because the timer is a decrementing counter */