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path: root/drivers/clocksource/timer-prima2.c
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Diffstat (limited to 'drivers/clocksource/timer-prima2.c')
-rw-r--r--drivers/clocksource/timer-prima2.c16
1 files changed, 10 insertions, 6 deletions
diff --git a/drivers/clocksource/timer-prima2.c b/drivers/clocksource/timer-prima2.c
index 8a492d34ff9f..1a6b2d6356d6 100644
--- a/drivers/clocksource/timer-prima2.c
+++ b/drivers/clocksource/timer-prima2.c
@@ -21,6 +21,8 @@
21#include <linux/sched_clock.h> 21#include <linux/sched_clock.h>
22#include <asm/mach/time.h> 22#include <asm/mach/time.h>
23 23
24#define PRIMA2_CLOCK_FREQ 1000000
25
24#define SIRFSOC_TIMER_COUNTER_LO 0x0000 26#define SIRFSOC_TIMER_COUNTER_LO 0x0000
25#define SIRFSOC_TIMER_COUNTER_HI 0x0004 27#define SIRFSOC_TIMER_COUNTER_HI 0x0004
26#define SIRFSOC_TIMER_MATCH_0 0x0008 28#define SIRFSOC_TIMER_MATCH_0 0x0008
@@ -173,7 +175,7 @@ static u64 notrace sirfsoc_read_sched_clock(void)
173static void __init sirfsoc_clockevent_init(void) 175static void __init sirfsoc_clockevent_init(void)
174{ 176{
175 sirfsoc_clockevent.cpumask = cpumask_of(0); 177 sirfsoc_clockevent.cpumask = cpumask_of(0);
176 clockevents_config_and_register(&sirfsoc_clockevent, CLOCK_TICK_RATE, 178 clockevents_config_and_register(&sirfsoc_clockevent, PRIMA2_CLOCK_FREQ,
177 2, -2); 179 2, -2);
178} 180}
179 181
@@ -190,8 +192,8 @@ static void __init sirfsoc_prima2_timer_init(struct device_node *np)
190 192
191 rate = clk_get_rate(clk); 193 rate = clk_get_rate(clk);
192 194
193 BUG_ON(rate < CLOCK_TICK_RATE); 195 BUG_ON(rate < PRIMA2_CLOCK_FREQ);
194 BUG_ON(rate % CLOCK_TICK_RATE); 196 BUG_ON(rate % PRIMA2_CLOCK_FREQ);
195 197
196 sirfsoc_timer_base = of_iomap(np, 0); 198 sirfsoc_timer_base = of_iomap(np, 0);
197 if (!sirfsoc_timer_base) 199 if (!sirfsoc_timer_base)
@@ -199,14 +201,16 @@ static void __init sirfsoc_prima2_timer_init(struct device_node *np)
199 201
200 sirfsoc_timer_irq.irq = irq_of_parse_and_map(np, 0); 202 sirfsoc_timer_irq.irq = irq_of_parse_and_map(np, 0);
201 203
202 writel_relaxed(rate / CLOCK_TICK_RATE / 2 - 1, sirfsoc_timer_base + SIRFSOC_TIMER_DIV); 204 writel_relaxed(rate / PRIMA2_CLOCK_FREQ / 2 - 1,
205 sirfsoc_timer_base + SIRFSOC_TIMER_DIV);
203 writel_relaxed(0, sirfsoc_timer_base + SIRFSOC_TIMER_COUNTER_LO); 206 writel_relaxed(0, sirfsoc_timer_base + SIRFSOC_TIMER_COUNTER_LO);
204 writel_relaxed(0, sirfsoc_timer_base + SIRFSOC_TIMER_COUNTER_HI); 207 writel_relaxed(0, sirfsoc_timer_base + SIRFSOC_TIMER_COUNTER_HI);
205 writel_relaxed(BIT(0), sirfsoc_timer_base + SIRFSOC_TIMER_STATUS); 208 writel_relaxed(BIT(0), sirfsoc_timer_base + SIRFSOC_TIMER_STATUS);
206 209
207 BUG_ON(clocksource_register_hz(&sirfsoc_clocksource, CLOCK_TICK_RATE)); 210 BUG_ON(clocksource_register_hz(&sirfsoc_clocksource,
211 PRIMA2_CLOCK_FREQ));
208 212
209 sched_clock_register(sirfsoc_read_sched_clock, 64, CLOCK_TICK_RATE); 213 sched_clock_register(sirfsoc_read_sched_clock, 64, PRIMA2_CLOCK_FREQ);
210 214
211 BUG_ON(setup_irq(sirfsoc_timer_irq.irq, &sirfsoc_timer_irq)); 215 BUG_ON(setup_irq(sirfsoc_timer_irq.irq, &sirfsoc_timer_irq));
212 216