aboutsummaryrefslogtreecommitdiffstats
path: root/drivers/clocksource/scx200_hrt.c
diff options
context:
space:
mode:
Diffstat (limited to 'drivers/clocksource/scx200_hrt.c')
-rw-r--r--drivers/clocksource/scx200_hrt.c101
1 files changed, 101 insertions, 0 deletions
diff --git a/drivers/clocksource/scx200_hrt.c b/drivers/clocksource/scx200_hrt.c
new file mode 100644
index 000000000000..d418b8297211
--- /dev/null
+++ b/drivers/clocksource/scx200_hrt.c
@@ -0,0 +1,101 @@
1/*
2 * Copyright (C) 2006 Jim Cromie
3 *
4 * This is a clocksource driver for the Geode SCx200's 1 or 27 MHz
5 * high-resolution timer. The Geode SC-1100 (at least) has a buggy
6 * time stamp counter (TSC), which loses time unless 'idle=poll' is
7 * given as a boot-arg. In its absence, the Generic Timekeeping code
8 * will detect and de-rate the bad TSC, allowing this timer to take
9 * over timekeeping duties.
10 *
11 * Based on work by John Stultz, and Ted Phelps (in a 2.6.12-rc6 patch)
12 *
13 * This program is free software; you can redistribute it and/or
14 * modify it under the terms of the GNU General Public License as
15 * published by the Free Software Foundation; either version 2 of the
16 * License, or (at your option) any later version.
17 */
18
19#include <linux/clocksource.h>
20#include <linux/init.h>
21#include <linux/module.h>
22#include <linux/ioport.h>
23#include <linux/scx200.h>
24
25#define NAME "scx200_hrt"
26
27static int mhz27;
28module_param(mhz27, int, 0); /* load time only */
29MODULE_PARM_DESC(mhz27, "count at 27.0 MHz (default is 1.0 MHz)");
30
31static int ppm;
32module_param(ppm, int, 0); /* load time only */
33MODULE_PARM_DESC(ppm, "+-adjust to actual XO freq (ppm)");
34
35/* HiRes Timer configuration register address */
36#define SCx200_TMCNFG_OFFSET (SCx200_TIMER_OFFSET + 5)
37
38/* and config settings */
39#define HR_TMEN (1 << 0) /* timer interrupt enable */
40#define HR_TMCLKSEL (1 << 1) /* 1|0 counts at 27|1 MHz */
41#define HR_TM27MPD (1 << 2) /* 1 turns off input clock (power-down) */
42
43/* The base timer frequency, * 27 if selected */
44#define HRT_FREQ 1000000
45
46static cycle_t read_hrt(void)
47{
48 /* Read the timer value */
49 return (cycle_t) inl(scx200_cb_base + SCx200_TIMER_OFFSET);
50}
51
52#define HRT_SHIFT_1 22
53#define HRT_SHIFT_27 26
54
55static struct clocksource cs_hrt = {
56 .name = "scx200_hrt",
57 .rating = 250,
58 .read = read_hrt,
59 .mask = CLOCKSOURCE_MASK(32),
60 .is_continuous = 1,
61 /* mult, shift are set based on mhz27 flag */
62};
63
64static int __init init_hrt_clocksource(void)
65{
66 /* Make sure scx200 has initializedd the configuration block */
67 if (!scx200_cb_present())
68 return -ENODEV;
69
70 /* Reserve the timer's ISA io-region for ourselves */
71 if (!request_region(scx200_cb_base + SCx200_TIMER_OFFSET,
72 SCx200_TIMER_SIZE,
73 "NatSemi SCx200 High-Resolution Timer")) {
74 printk(KERN_WARNING NAME ": unable to lock timer region\n");
75 return -ENODEV;
76 }
77
78 /* write timer config */
79 outb(HR_TMEN | (mhz27) ? HR_TMCLKSEL : 0,
80 scx200_cb_base + SCx200_TMCNFG_OFFSET);
81
82 if (mhz27) {
83 cs_hrt.shift = HRT_SHIFT_27;
84 cs_hrt.mult = clocksource_hz2mult((HRT_FREQ + ppm) * 27,
85 cs_hrt.shift);
86 } else {
87 cs_hrt.shift = HRT_SHIFT_1;
88 cs_hrt.mult = clocksource_hz2mult(HRT_FREQ + ppm,
89 cs_hrt.shift);
90 }
91 printk(KERN_INFO "enabling scx200 high-res timer (%s MHz +%d ppm)\n",
92 mhz27 ? "27":"1", ppm);
93
94 return clocksource_register(&cs_hrt);
95}
96
97module_init(init_hrt_clocksource);
98
99MODULE_AUTHOR("Jim Cromie <jim.cromie@gmail.com>");
100MODULE_DESCRIPTION("clocksource on SCx200 HiRes Timer");
101MODULE_LICENSE("GPL");