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Diffstat (limited to 'drivers/clocksource/clksrc-dbx500-prcmu.c')
-rw-r--r--drivers/clocksource/clksrc-dbx500-prcmu.c6
1 files changed, 4 insertions, 2 deletions
diff --git a/drivers/clocksource/clksrc-dbx500-prcmu.c b/drivers/clocksource/clksrc-dbx500-prcmu.c
index 0ac5093a053a..59feefe0e3e6 100644
--- a/drivers/clocksource/clksrc-dbx500-prcmu.c
+++ b/drivers/clocksource/clksrc-dbx500-prcmu.c
@@ -31,7 +31,7 @@
31 31
32#define SCHED_CLOCK_MIN_WRAP 131072 /* 2^32 / 32768 */ 32#define SCHED_CLOCK_MIN_WRAP 131072 /* 2^32 / 32768 */
33 33
34void __iomem *clksrc_dbx500_timer_base; 34static void __iomem *clksrc_dbx500_timer_base;
35 35
36static cycle_t clksrc_dbx500_prcmu_read(struct clocksource *cs) 36static cycle_t clksrc_dbx500_prcmu_read(struct clocksource *cs)
37{ 37{
@@ -79,8 +79,10 @@ static void notrace clksrc_dbx500_prcmu_update_sched_clock(void)
79} 79}
80#endif 80#endif
81 81
82void __init clksrc_dbx500_prcmu_init(void) 82void __init clksrc_dbx500_prcmu_init(void __iomem *base)
83{ 83{
84 clksrc_dbx500_timer_base = base;
85
84 /* 86 /*
85 * The A9 sub system expects the timer to be configured as 87 * The A9 sub system expects the timer to be configured as
86 * a continous looping timer. 88 * a continous looping timer.