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-rw-r--r--drivers/clk/rockchip/clk-rk3288.c14
1 files changed, 7 insertions, 7 deletions
diff --git a/drivers/clk/rockchip/clk-rk3288.c b/drivers/clk/rockchip/clk-rk3288.c
index 11194b8329fe..cbcddcc02475 100644
--- a/drivers/clk/rockchip/clk-rk3288.c
+++ b/drivers/clk/rockchip/clk-rk3288.c
@@ -190,7 +190,7 @@ PNAME(mux_uart2_p) = { "uart2_src", "uart2_frac", "xin24m" };
190PNAME(mux_uart3_p) = { "uart3_src", "uart3_frac", "xin24m" }; 190PNAME(mux_uart3_p) = { "uart3_src", "uart3_frac", "xin24m" };
191PNAME(mux_uart4_p) = { "uart4_src", "uart4_frac", "xin24m" }; 191PNAME(mux_uart4_p) = { "uart4_src", "uart4_frac", "xin24m" };
192PNAME(mux_cif_out_p) = { "cif_src", "xin24m" }; 192PNAME(mux_cif_out_p) = { "cif_src", "xin24m" };
193PNAME(mux_macref_p) = { "mac_src", "ext_gmac" }; 193PNAME(mux_mac_p) = { "mac_pll_src", "ext_gmac" };
194PNAME(mux_hsadcout_p) = { "hsadc_src", "ext_hsadc" }; 194PNAME(mux_hsadcout_p) = { "hsadc_src", "ext_hsadc" };
195PNAME(mux_edp_24m_p) = { "ext_edp_24m", "xin24m" }; 195PNAME(mux_edp_24m_p) = { "ext_edp_24m", "xin24m" };
196PNAME(mux_tspout_p) = { "cpll", "gpll", "npll", "xin27m" }; 196PNAME(mux_tspout_p) = { "cpll", "gpll", "npll", "xin27m" };
@@ -575,18 +575,18 @@ static struct rockchip_clk_branch rk3288_clk_branches[] __initdata = {
575 MUX(SCLK_UART4, "sclk_uart4", mux_uart4_p, 0, 575 MUX(SCLK_UART4, "sclk_uart4", mux_uart4_p, 0,
576 RK3288_CLKSEL_CON(3), 8, 2, MFLAGS), 576 RK3288_CLKSEL_CON(3), 8, 2, MFLAGS),
577 577
578 COMPOSITE(0, "mac_src", mux_pll_src_npll_cpll_gpll_p, 0, 578 COMPOSITE(0, "mac_pll_src", mux_pll_src_npll_cpll_gpll_p, 0,
579 RK3288_CLKSEL_CON(21), 0, 2, MFLAGS, 8, 5, DFLAGS, 579 RK3288_CLKSEL_CON(21), 0, 2, MFLAGS, 8, 5, DFLAGS,
580 RK3288_CLKGATE_CON(2), 5, GFLAGS), 580 RK3288_CLKGATE_CON(2), 5, GFLAGS),
581 MUX(0, "macref", mux_macref_p, 0, 581 MUX(SCLK_MAC, "mac_clk", mux_mac_p, 0,
582 RK3288_CLKSEL_CON(21), 4, 1, MFLAGS), 582 RK3288_CLKSEL_CON(21), 4, 1, MFLAGS),
583 GATE(0, "sclk_macref_out", "macref", 0, 583 GATE(SCLK_MACREF_OUT, "sclk_macref_out", "mac_clk", 0,
584 RK3288_CLKGATE_CON(5), 3, GFLAGS), 584 RK3288_CLKGATE_CON(5), 3, GFLAGS),
585 GATE(SCLK_MACREF, "sclk_macref", "macref", 0, 585 GATE(SCLK_MACREF, "sclk_macref", "mac_clk", 0,
586 RK3288_CLKGATE_CON(5), 2, GFLAGS), 586 RK3288_CLKGATE_CON(5), 2, GFLAGS),
587 GATE(SCLK_MAC_RX, "sclk_mac_rx", "macref", 0, 587 GATE(SCLK_MAC_RX, "sclk_mac_rx", "mac_clk", 0,
588 RK3288_CLKGATE_CON(5), 0, GFLAGS), 588 RK3288_CLKGATE_CON(5), 0, GFLAGS),
589 GATE(SCLK_MAC_TX, "sclk_mac_tx", "macref", 0, 589 GATE(SCLK_MAC_TX, "sclk_mac_tx", "mac_clk", 0,
590 RK3288_CLKGATE_CON(5), 1, GFLAGS), 590 RK3288_CLKGATE_CON(5), 1, GFLAGS),
591 591
592 COMPOSITE(0, "hsadc_src", mux_pll_src_cpll_gpll_p, 0, 592 COMPOSITE(0, "hsadc_src", mux_pll_src_cpll_gpll_p, 0,