11 files changed, 159 insertions, 154 deletions

diff --git a/drivers/clk/clk-bcm2835.c b/drivers/clk/clk-bcm2835.c
index 5fb4ff53d088..6b950ca8b711 100644
--- a/drivers/clk/clk-bcm2835.c
+++ b/drivers/clk/clk-bcm2835.c
@@ -20,14 +20,8 @@
 #include <linux/clk-provider.h>
 #include <linux/clkdev.h>
 #include <linux/clk/bcm2835.h>
-#include <linux/clk-provider.h>
 #include <linux/of.h>
 
-static const struct of_device_id clk_match[] __initconst = {
-        { .compatible = "fixed-clock", .data = of_fixed_clk_setup, },
-        { }
-};
-
 /*
  * These are fixed clocks. They're probably not all root clocks and it may
  * be possible to turn them on and off but until this is mapped out better
@@ -63,6 +57,4 @@ void __init bcm2835_init_clocks(void)
         ret = clk_register_clkdev(clk, NULL, "20215000.uart");
         if (ret)
                 pr_err("uart1_pclk alias not registered\n");
-
-        of_clk_init(clk_match);
 }
diff --git a/drivers/clk/clk-highbank.c b/drivers/clk/clk-highbank.c
index 2e08cb001936..2e7e9d9798cb 100644
--- a/drivers/clk/clk-highbank.c
+++ b/drivers/clk/clk-highbank.c
@@ -20,8 +20,7 @@
 #include <linux/clk-provider.h>
 #include <linux/io.h>
 #include <linux/of.h>
-
-extern void __iomem *sregs_base;
+#include <linux/of_address.h>
 
 #define HB_PLL_LOCK_500         0x20000000
 #define HB_PLL_LOCK             0x10000000
@@ -280,6 +279,7 @@ static __init struct clk *hb_clk_init(struct device_node *node, const struct clk
         const char *clk_name = node->name;
         const char *parent_name;
         struct clk_init_data init;
+        struct device_node *srnp;
         int rc;
 
         rc = of_property_read_u32(node, "reg", &reg);
@@ -290,7 +290,11 @@ static __init struct clk *hb_clk_init(struct device_node *node, const struct clk
         if (WARN_ON(!hb_clk))
                 return NULL;
 
-        hb_clk->reg = sregs_base + reg;
+        /* Map system registers */
+        srnp = of_find_compatible_node(NULL, NULL, "calxeda,hb-sregs");
+        hb_clk->reg = of_iomap(srnp, 0);
+        BUG_ON(!hb_clk->reg);
+        hb_clk->reg += reg;
 
         of_property_read_string(node, "clock-output-names", &clk_name);
 
diff --git a/drivers/clk/clk-nomadik.c b/drivers/clk/clk-nomadik.c
index 51410c2ac2cb..6a934a5296bd 100644
--- a/drivers/clk/clk-nomadik.c
+++ b/drivers/clk/clk-nomadik.c
@@ -27,6 +27,14 @@
  */
 
 #define SRC_CR                  0x00U
+#define SRC_CR_T0_ENSEL         BIT(15)
+#define SRC_CR_T1_ENSEL         BIT(17)
+#define SRC_CR_T2_ENSEL         BIT(19)
+#define SRC_CR_T3_ENSEL         BIT(21)
+#define SRC_CR_T4_ENSEL         BIT(23)
+#define SRC_CR_T5_ENSEL         BIT(25)
+#define SRC_CR_T6_ENSEL         BIT(27)
+#define SRC_CR_T7_ENSEL         BIT(29)
 #define SRC_XTALCR              0x0CU
 #define SRC_XTALCR_XTALTIMEN    BIT(20)
 #define SRC_XTALCR_SXTALDIS     BIT(19)
@@ -54,6 +62,79 @@ static DEFINE_SPINLOCK(src_lock);
 /* Base address of the SRC */
 static void __iomem *src_base;
 
+static int nomadik_clk_reboot_handler(struct notifier_block *this,
+                                unsigned long code,
+                                void *unused)
+{
+        u32 val;
+
+        /* The main chrystal need to be enabled for reboot to work */
+        val = readl(src_base + SRC_XTALCR);
+        val &= ~SRC_XTALCR_MXTALOVER;
+        val |= SRC_XTALCR_MXTALEN;
+        pr_crit("force-enabling MXTALO\n");
+        writel(val, src_base + SRC_XTALCR);
+        return NOTIFY_OK;
+}
+
+static struct notifier_block nomadik_clk_reboot_notifier = {
+        .notifier_call = nomadik_clk_reboot_handler,
+};
+
+static const struct of_device_id nomadik_src_match[] __initconst = {
+        { .compatible = "stericsson,nomadik-src" },
+        { /* sentinel */ }
+};
+
+static void __init nomadik_src_init(void)
+{
+        struct device_node *np;
+        u32 val;
+
+        np = of_find_matching_node(NULL, nomadik_src_match);
+        if (!np) {
+                pr_crit("no matching node for SRC, aborting clock init\n");
+                return;
+        }
+        src_base = of_iomap(np, 0);
+        if (!src_base) {
+                pr_err("%s: must have src parent node with REGS (%s)\n",
+                       __func__, np->name);
+                return;
+        }
+
+        /* Set all timers to use the 2.4 MHz TIMCLK */
+        val = readl(src_base + SRC_CR);
+        val |= SRC_CR_T0_ENSEL;
+        val |= SRC_CR_T1_ENSEL;
+        val |= SRC_CR_T2_ENSEL;
+        val |= SRC_CR_T3_ENSEL;
+        val |= SRC_CR_T4_ENSEL;
+        val |= SRC_CR_T5_ENSEL;
+        val |= SRC_CR_T6_ENSEL;
+        val |= SRC_CR_T7_ENSEL;
+        writel(val, src_base + SRC_CR);
+
+        val = readl(src_base + SRC_XTALCR);
+        pr_info("SXTALO is %s\n",
+                (val & SRC_XTALCR_SXTALDIS) ? "disabled" : "enabled");
+        pr_info("MXTAL is %s\n",
+                (val & SRC_XTALCR_MXTALSTAT) ? "enabled" : "disabled");
+        if (of_property_read_bool(np, "disable-sxtalo")) {
+                /* The machine uses an external oscillator circuit */
+                val |= SRC_XTALCR_SXTALDIS;
+                pr_info("disabling SXTALO\n");
+        }
+        if (of_property_read_bool(np, "disable-mxtalo")) {
+                /* Disable this too: also run by external oscillator */
+                val |= SRC_XTALCR_MXTALOVER;
+                val &= ~SRC_XTALCR_MXTALEN;
+                pr_info("disabling MXTALO\n");
+        }
+        writel(val, src_base + SRC_XTALCR);
+        register_reboot_notifier(&nomadik_clk_reboot_notifier);
+}
+
 /**
  * struct clk_pll1 - Nomadik PLL1 clock
  * @hw: corresponding clock hardware entry
@@ -431,6 +512,9 @@ static void __init of_nomadik_pll_setup(struct device_node *np)
         const char *parent_name;
         u32 pll_id;
 
+        if (!src_base)
+                nomadik_src_init();
+
         if (of_property_read_u32(np, "pll-id", &pll_id)) {
                 pr_err("%s: PLL \"%s\" missing pll-id property\n",
                         __func__, clk_name);
@@ -441,6 +525,8 @@ static void __init of_nomadik_pll_setup(struct device_node *np)
         if (!IS_ERR(clk))
                 of_clk_add_provider(np, of_clk_src_simple_get, clk);
 }
+CLK_OF_DECLARE(nomadik_pll_clk,
+        "st,nomadik-pll-clock", of_nomadik_pll_setup);
 
 static void __init of_nomadik_hclk_setup(struct device_node *np)
 {
@@ -448,6 +534,9 @@ static void __init of_nomadik_hclk_setup(struct device_node *np)
         const char *clk_name = np->name;
         const char *parent_name;
 
+        if (!src_base)
+                nomadik_src_init();
+
         parent_name = of_clk_get_parent_name(np, 0);
         /*
          * The HCLK divides PLL1 with 1 (passthru), 2, 3 or 4.
@@ -460,6 +549,8 @@ static void __init of_nomadik_hclk_setup(struct device_node *np)
         if (!IS_ERR(clk))
                 of_clk_add_provider(np, of_clk_src_simple_get, clk);
 }
+CLK_OF_DECLARE(nomadik_hclk_clk,
+        "st,nomadik-hclk-clock", of_nomadik_hclk_setup);
 
 static void __init of_nomadik_src_clk_setup(struct device_node *np)
 {
@@ -468,6 +559,9 @@ static void __init of_nomadik_src_clk_setup(struct device_node *np)
         const char *parent_name;
         u32 clk_id;
 
+        if (!src_base)
+                nomadik_src_init();
+
         if (of_property_read_u32(np, "clock-id", &clk_id)) {
                 pr_err("%s: SRC clock \"%s\" missing clock-id property\n",
                         __func__, clk_name);
@@ -478,89 +572,5 @@ static void __init of_nomadik_src_clk_setup(struct device_node *np)
         if (!IS_ERR(clk))
                 of_clk_add_provider(np, of_clk_src_simple_get, clk);
 }
-
-static const struct of_device_id nomadik_src_match[] __initconst = {
-        { .compatible = "stericsson,nomadik-src" },
-        { /* sentinel */ }
-};
-
-static const struct of_device_id nomadik_src_clk_match[] __initconst = {
-        {
-                .compatible = "fixed-clock",
-                .data = of_fixed_clk_setup,
-        },
-        {
-                .compatible = "fixed-factor-clock",
-                .data = of_fixed_factor_clk_setup,
-        },
-        {
-                .compatible = "st,nomadik-pll-clock",
-                .data = of_nomadik_pll_setup,
-        },
-        {
-                .compatible = "st,nomadik-hclk-clock",
-                .data = of_nomadik_hclk_setup,
-        },
-        {
-                .compatible = "st,nomadik-src-clock",
-                .data = of_nomadik_src_clk_setup,
-        },
-        { /* sentinel */ }
-};
-
-static int nomadik_clk_reboot_handler(struct notifier_block *this,
-                                unsigned long code,
-                                void *unused)
-{
-        u32 val;
-
-        /* The main chrystal need to be enabled for reboot to work */
-        val = readl(src_base + SRC_XTALCR);
-        val &= ~SRC_XTALCR_MXTALOVER;
-        val |= SRC_XTALCR_MXTALEN;
-        pr_crit("force-enabling MXTALO\n");
-        writel(val, src_base + SRC_XTALCR);
-        return NOTIFY_OK;
-}
-
-static struct notifier_block nomadik_clk_reboot_notifier = {
-        .notifier_call = nomadik_clk_reboot_handler,
-};
-
-void __init nomadik_clk_init(void)
-{
-        struct device_node *np;
-        u32 val;
-
-        np = of_find_matching_node(NULL, nomadik_src_match);
-        if (!np) {
-                pr_crit("no matching node for SRC, aborting clock init\n");
-                return;
-        }
-        src_base = of_iomap(np, 0);
-        if (!src_base) {
-                pr_err("%s: must have src parent node with REGS (%s)\n",
-                       __func__, np->name);
-                return;
-        }
-        val = readl(src_base + SRC_XTALCR);
-        pr_info("SXTALO is %s\n",
-                (val & SRC_XTALCR_SXTALDIS) ? "disabled" : "enabled");
-        pr_info("MXTAL is %s\n",
-                (val & SRC_XTALCR_MXTALSTAT) ? "enabled" : "disabled");
-        if (of_property_read_bool(np, "disable-sxtalo")) {
-                /* The machine uses an external oscillator circuit */
-                val |= SRC_XTALCR_SXTALDIS;
-                pr_info("disabling SXTALO\n");
-        }
-        if (of_property_read_bool(np, "disable-mxtalo")) {
-                /* Disable this too: also run by external oscillator */
-                val |= SRC_XTALCR_MXTALOVER;
-                val &= ~SRC_XTALCR_MXTALEN;
-                pr_info("disabling MXTALO\n");
-        }
-        writel(val, src_base + SRC_XTALCR);
-        register_reboot_notifier(&nomadik_clk_reboot_notifier);
-
-        of_clk_init(nomadik_src_clk_match);
-}
+CLK_OF_DECLARE(nomadik_src_clk,
+        "st,nomadik-src-clock", of_nomadik_src_clk_setup);
diff --git a/drivers/clk/clk-prima2.c b/drivers/clk/clk-prima2.c
index 5ab95f1ad579..6c15e3316137 100644
--- a/drivers/clk/clk-prima2.c
+++ b/drivers/clk/clk-prima2.c
@@ -1015,16 +1015,6 @@ static struct clk_std clk_usb1 = {
         },
 };
 
-static struct of_device_id clkc_ids[] = {
-        { .compatible = "sirf,prima2-clkc" },
-        {},
-};
-
-static struct of_device_id rsc_ids[] = {
-        { .compatible = "sirf,prima2-rsc" },
-        {},
-};
-
 enum prima2_clk_index {
         /* 0    1     2      3      4      5      6       7         8      9 */
         rtc,    osc,   pll1,  pll2,  pll3,  mem,   sys,   security, dsp,   gps,
@@ -1082,24 +1072,16 @@ static struct clk_hw *prima2_clk_hw_array[maxclk] __initdata = {
 static struct clk *prima2_clks[maxclk];
 static struct clk_onecell_data clk_data;
 
-void __init sirfsoc_of_clk_init(void)
+static void __init sirfsoc_clk_init(struct device_node *np)
 {
-        struct device_node *np;
+        struct device_node *rscnp;
         int i;
 
-        np = of_find_matching_node(NULL, rsc_ids);
-        if (!np)
-                panic("unable to find compatible rsc node in dtb\n");
-
-        sirfsoc_rsc_vbase = of_iomap(np, 0);
+        rscnp = of_find_compatible_node(NULL, NULL, "sirf,prima2-rsc");
+        sirfsoc_rsc_vbase = of_iomap(rscnp, 0);
         if (!sirfsoc_rsc_vbase)
                 panic("unable to map rsc registers\n");
-
-        of_node_put(np);
-
-        np = of_find_matching_node(NULL, clkc_ids);
-        if (!np)
-                return;
+        of_node_put(rscnp);
 
         sirfsoc_clk_vbase = of_iomap(np, 0);
         if (!sirfsoc_clk_vbase)
@@ -1124,3 +1106,4 @@ void __init sirfsoc_of_clk_init(void)
 
         of_clk_add_provider(np, of_clk_src_onecell_get, &clk_data);
 }
+CLK_OF_DECLARE(sirfsoc_clk, "sirf,prima2-clkc", sirfsoc_clk_init);
diff --git a/drivers/clk/clk-vt8500.c b/drivers/clk/clk-vt8500.c
index 82306f5fb9c2..7fd5c5e9e25d 100644
--- a/drivers/clk/clk-vt8500.c
+++ b/drivers/clk/clk-vt8500.c
@@ -15,11 +15,14 @@
 
 #include <linux/io.h>
 #include <linux/of.h>
+#include <linux/of_address.h>
 #include <linux/slab.h>
 #include <linux/bitops.h>
 #include <linux/clkdev.h>
 #include <linux/clk-provider.h>
 
+#define LEGACY_PMC_BASE         0xD8130000
+
 /* All clocks share the same lock as none can be changed concurrently */
 static DEFINE_SPINLOCK(_lock);
 
@@ -53,6 +56,21 @@ struct clk_pll {
 
 static void __iomem *pmc_base;
 
+static __init void vtwm_set_pmc_base(void)
+{
+        struct device_node *np =
+                of_find_compatible_node(NULL, NULL, "via,vt8500-pmc");
+
+        if (np)
+                pmc_base = of_iomap(np, 0);
+        else
+                pmc_base = ioremap(LEGACY_PMC_BASE, 0x1000);
+        of_node_put(np);
+
+        if (!pmc_base)
+                pr_err("%s:of_iomap(pmc) failed\n", __func__);
+}
+
 #define to_clk_device(_hw) container_of(_hw, struct clk_device, hw)
 
 #define VT8500_PMC_BUSY_MASK            0x18
@@ -222,6 +240,9 @@ static __init void vtwm_device_clk_init(struct device_node *node)
         int rc;
         int clk_init_flags = 0;
 
+        if (!pmc_base)
+                vtwm_set_pmc_base();
+
         dev_clk = kzalloc(sizeof(*dev_clk), GFP_KERNEL);
         if (WARN_ON(!dev_clk))
                 return;
@@ -636,6 +657,9 @@ static __init void vtwm_pll_clk_init(struct device_node *node, int pll_type)
         struct clk_init_data init;
         int rc;
 
+        if (!pmc_base)
+                vtwm_set_pmc_base();
+
         rc = of_property_read_u32(node, "reg", &reg);
         if (WARN_ON(rc))
                 return;
@@ -694,13 +718,3 @@ static void __init wm8850_pll_init(struct device_node *node)
         vtwm_pll_clk_init(node, PLL_TYPE_WM8850);
 }
 CLK_OF_DECLARE(wm8850_pll, "wm,wm8850-pll-clock", wm8850_pll_init);
-
-void __init vtwm_clk_init(void __iomem *base)
-{
-        if (!base)
-                return;
-
-        pmc_base = base;
-
-        of_clk_init(NULL);
-}
diff --git a/drivers/clk/mvebu/armada-370.c b/drivers/clk/mvebu/armada-370.c
index fc777bdc1886..81a202d12a7a 100644
--- a/drivers/clk/mvebu/armada-370.c
+++ b/drivers/clk/mvebu/armada-370.c
@@ -39,8 +39,8 @@ static const struct coreclk_ratio a370_coreclk_ratios[] __initconst = {
 };
 
 static const u32 a370_tclk_freqs[] __initconst = {
-        16600000,
-        20000000,
+        166000000,
+        200000000,
 };
 
 static u32 __init a370_get_tclk_freq(void __iomem *sar)
diff --git a/drivers/clk/mxs/clk-imx23.c b/drivers/clk/mxs/clk-imx23.c
index c396fe361589..9fc9359f5133 100644
--- a/drivers/clk/mxs/clk-imx23.c
+++ b/drivers/clk/mxs/clk-imx23.c
@@ -12,6 +12,7 @@
 #include <linux/clk.h>
 #include <linux/clk/mxs.h>
 #include <linux/clkdev.h>
+#include <linux/clk-provider.h>
 #include <linux/err.h>
 #include <linux/init.h>
 #include <linux/io.h>
@@ -100,16 +101,16 @@ static enum imx23_clk clks_init_on[] __initdata = {
         cpu, hbus, xbus, emi, uart,
 };
 
-int __init mx23_clocks_init(void)
+static void __init mx23_clocks_init(struct device_node *np)
 {
-        struct device_node *np;
+        struct device_node *dcnp;
         u32 i;
 
-        np = of_find_compatible_node(NULL, NULL, "fsl,imx23-digctl");
-        digctrl = of_iomap(np, 0);
+        dcnp = of_find_compatible_node(NULL, NULL, "fsl,imx23-digctl");
+        digctrl = of_iomap(dcnp, 0);
         WARN_ON(!digctrl);
+        of_node_put(dcnp);
 
-        np = of_find_compatible_node(NULL, NULL, "fsl,imx23-clkctrl");
         clkctrl = of_iomap(np, 0);
         WARN_ON(!clkctrl);
 
@@ -162,7 +163,7 @@ int __init mx23_clocks_init(void)
                 if (IS_ERR(clks[i])) {
                         pr_err("i.MX23 clk %d: register failed with %ld\n",
                                 i, PTR_ERR(clks[i]));
-                        return PTR_ERR(clks[i]);
+                        return;
                 }
 
         clk_data.clks = clks;
@@ -172,5 +173,5 @@ int __init mx23_clocks_init(void)
         for (i = 0; i < ARRAY_SIZE(clks_init_on); i++)
                 clk_prepare_enable(clks[clks_init_on[i]]);
 
-        return 0;
 }
+CLK_OF_DECLARE(imx23_clkctrl, "fsl,imx23-clkctrl", mx23_clocks_init);
diff --git a/drivers/clk/mxs/clk-imx28.c b/drivers/clk/mxs/clk-imx28.c
index 4faf0afc44cd..a6c35010e4e5 100644
--- a/drivers/clk/mxs/clk-imx28.c
+++ b/drivers/clk/mxs/clk-imx28.c
@@ -12,6 +12,7 @@
 #include <linux/clk.h>
 #include <linux/clk/mxs.h>
 #include <linux/clkdev.h>
+#include <linux/clk-provider.h>
 #include <linux/err.h>
 #include <linux/init.h>
 #include <linux/io.h>
@@ -154,16 +155,16 @@ static enum imx28_clk clks_init_on[] __initdata = {
         cpu, hbus, xbus, emi, uart,
 };
 
-int __init mx28_clocks_init(void)
+static void __init mx28_clocks_init(struct device_node *np)
 {
-        struct device_node *np;
+        struct device_node *dcnp;
         u32 i;
 
-        np = of_find_compatible_node(NULL, NULL, "fsl,imx28-digctl");
-        digctrl = of_iomap(np, 0);
+        dcnp = of_find_compatible_node(NULL, NULL, "fsl,imx28-digctl");
+        digctrl = of_iomap(dcnp, 0);
         WARN_ON(!digctrl);
+        of_node_put(dcnp);
 
-        np = of_find_compatible_node(NULL, NULL, "fsl,imx28-clkctrl");
         clkctrl = of_iomap(np, 0);
         WARN_ON(!clkctrl);
 
@@ -239,7 +240,7 @@ int __init mx28_clocks_init(void)
                 if (IS_ERR(clks[i])) {
                         pr_err("i.MX28 clk %d: register failed with %ld\n",
                                 i, PTR_ERR(clks[i]));
-                        return PTR_ERR(clks[i]);
+                        return;
                 }
 
         clk_data.clks = clks;
@@ -250,6 +251,5 @@ int __init mx28_clocks_init(void)
 
         for (i = 0; i < ARRAY_SIZE(clks_init_on); i++)
                 clk_prepare_enable(clks[clks_init_on[i]]);
-
-        return 0;
 }
+CLK_OF_DECLARE(imx28_clkctrl, "fsl,imx28-clkctrl", mx28_clocks_init);
diff --git a/drivers/clk/socfpga/clk.c b/drivers/clk/socfpga/clk.c
index 5bb848cac6ec..81dd31a686df 100644
--- a/drivers/clk/socfpga/clk.c
+++ b/drivers/clk/socfpga/clk.c
@@ -49,7 +49,7 @@
 #define SOCFPGA_L4_SP_CLK               "l4_sp_clk"
 #define SOCFPGA_NAND_CLK                "nand_clk"
 #define SOCFPGA_NAND_X_CLK              "nand_x_clk"
-#define SOCFPGA_MMC_CLK                 "mmc_clk"
+#define SOCFPGA_MMC_CLK                 "sdmmc_clk"
 #define SOCFPGA_DB_CLK                  "gpio_db_clk"
 
 #define div_mask(width) ((1 << (width)) - 1)
diff --git a/drivers/clk/sunxi/clk-sunxi.c b/drivers/clk/sunxi/clk-sunxi.c
index 34ee69f4d50c..9bbd03514540 100644
--- a/drivers/clk/sunxi/clk-sunxi.c
+++ b/drivers/clk/sunxi/clk-sunxi.c
@@ -16,7 +16,6 @@
 
 #include <linux/clk-provider.h>
 #include <linux/clkdev.h>
-#include <linux/clk/sunxi.h>
 #include <linux/of.h>
 #include <linux/of_address.h>
 
@@ -617,11 +616,8 @@ static void __init of_sunxi_table_clock_setup(const struct of_device_id *clk_mat
         }
 }
 
-void __init sunxi_init_clocks(void)
+static void __init sunxi_init_clocks(struct device_node *np)
 {
-        /* Register all the simple and basic clocks on DT */
-        of_clk_init(NULL);
-
         /* Register factor clocks */
         of_sunxi_table_clock_setup(clk_factors_match, sunxi_factors_clk_setup);
 
@@ -634,3 +630,8 @@ void __init sunxi_init_clocks(void)
         /* Register gate clocks */
         of_sunxi_table_clock_setup(clk_gates_match, sunxi_gates_clk_setup);
 }
+CLK_OF_DECLARE(sun4i_a10_clk_init, "allwinner,sun4i-a10", sunxi_init_clocks);
+CLK_OF_DECLARE(sun5i_a10s_clk_init, "allwinner,sun5i-a10s", sunxi_init_clocks);
+CLK_OF_DECLARE(sun5i_a13_clk_init, "allwinner,sun5i-a13", sunxi_init_clocks);
+CLK_OF_DECLARE(sun6i_a31_clk_init, "allwinner,sun6i-a31", sunxi_init_clocks);
+CLK_OF_DECLARE(sun7i_a20_clk_init, "allwinner,sun7i-a20", sunxi_init_clocks);
diff --git a/drivers/clk/versatile/clk-icst.c b/drivers/clk/versatile/clk-icst.c
index 67ccf4aa7277..f5e4c21b301f 100644
--- a/drivers/clk/versatile/clk-icst.c
+++ b/drivers/clk/versatile/clk-icst.c
@@ -107,7 +107,7 @@ static int icst_set_rate(struct clk_hw *hw, unsigned long rate,
 
         vco = icst_hz_to_vco(icst->params, rate);
         icst->rate = icst_hz(icst->params, vco);
-        vco_set(icst->vcoreg, icst->lockreg, vco);
+        vco_set(icst->lockreg, icst->vcoreg, vco);
         return 0;
 }