1 files changed, 4 insertions, 7 deletions

diff --git a/drivers/clk/ux500/u8500_clk.c b/drivers/clk/ux500/u8500_clk.c
index 7d0e0258f204..6b889a0e90b3 100644
--- a/drivers/clk/ux500/u8500_clk.c
+++ b/drivers/clk/ux500/u8500_clk.c
@@ -12,7 +12,7 @@
 #include <linux/clk-provider.h>
 #include <linux/mfd/dbx500-prcmu.h>
 #include <linux/platform_data/clk-ux500.h>
-
+#include <mach/db8500-regs.h>
 #include "clk.h"
 
 void u8500_clk_init(void)
@@ -160,12 +160,6 @@ void u8500_clk_init(void)
         clk = clk_reg_prcmu_gate("uiccclk", NULL, PRCMU_UICCCLK, CLK_IS_ROOT);
         clk_register_clkdev(clk, NULL, "uicc");
 
-        /*
-         * FIXME: The MTU clocks might need some kind of "parent muxed join"
-         * and these have no K-clocks. For now, we ignore the missing
-         * connection to the corresponding P-clocks, p6_mtu0_clk and
-         * p6_mtu1_clk. Instead timclk is used which is the valid parent.
-         */
         clk = clk_reg_prcmu_gate("timclk", NULL, PRCMU_TIMCLK, CLK_IS_ROOT);
         clk_register_clkdev(clk, NULL, "mtu0");
         clk_register_clkdev(clk, NULL, "mtu1");
@@ -405,8 +399,11 @@ void u8500_clk_init(void)
 
         clk = clk_reg_prcc_pclk("p6_pclk6", "per6clk", U8500_CLKRST6_BASE,
                                 BIT(6), 0);
+        clk_register_clkdev(clk, "apb_pclk", "mtu0");
+
         clk = clk_reg_prcc_pclk("p6_pclk7", "per6clk", U8500_CLKRST6_BASE,
                                 BIT(7), 0);
+        clk_register_clkdev(clk, "apb_pclk", "mtu1");
 
         /* PRCC K-clocks
          *