diff options
Diffstat (limited to 'drivers/clk/tegra/clk-tegra30.c')
-rw-r--r-- | drivers/clk/tegra/clk-tegra30.c | 7 |
1 files changed, 6 insertions, 1 deletions
diff --git a/drivers/clk/tegra/clk-tegra30.c b/drivers/clk/tegra/clk-tegra30.c index 5bbacd01094f..4b9d8bd3d0bf 100644 --- a/drivers/clk/tegra/clk-tegra30.c +++ b/drivers/clk/tegra/clk-tegra30.c | |||
@@ -177,6 +177,7 @@ static unsigned long input_freq; | |||
177 | 177 | ||
178 | static DEFINE_SPINLOCK(cml_lock); | 178 | static DEFINE_SPINLOCK(cml_lock); |
179 | static DEFINE_SPINLOCK(pll_d_lock); | 179 | static DEFINE_SPINLOCK(pll_d_lock); |
180 | static DEFINE_SPINLOCK(emc_lock); | ||
180 | 181 | ||
181 | #define TEGRA_INIT_DATA_MUX(_name, _parents, _offset, \ | 182 | #define TEGRA_INIT_DATA_MUX(_name, _parents, _offset, \ |
182 | _clk_num, _gate_flags, _clk_id) \ | 183 | _clk_num, _gate_flags, _clk_id) \ |
@@ -1157,11 +1158,15 @@ static void __init tegra30_periph_clk_init(void) | |||
1157 | ARRAY_SIZE(mux_pllmcp_clkm), | 1158 | ARRAY_SIZE(mux_pllmcp_clkm), |
1158 | CLK_SET_RATE_NO_REPARENT, | 1159 | CLK_SET_RATE_NO_REPARENT, |
1159 | clk_base + CLK_SOURCE_EMC, | 1160 | clk_base + CLK_SOURCE_EMC, |
1160 | 30, 2, 0, NULL); | 1161 | 30, 2, 0, &emc_lock); |
1161 | clk = tegra_clk_register_periph_gate("emc", "emc_mux", 0, clk_base, 0, | 1162 | clk = tegra_clk_register_periph_gate("emc", "emc_mux", 0, clk_base, 0, |
1162 | 57, periph_clk_enb_refcnt); | 1163 | 57, periph_clk_enb_refcnt); |
1163 | clks[TEGRA30_CLK_EMC] = clk; | 1164 | clks[TEGRA30_CLK_EMC] = clk; |
1164 | 1165 | ||
1166 | clk = tegra_clk_register_mc("mc", "emc_mux", clk_base + CLK_SOURCE_EMC, | ||
1167 | &emc_lock); | ||
1168 | clks[TEGRA30_CLK_MC] = clk; | ||
1169 | |||
1165 | /* cml0 */ | 1170 | /* cml0 */ |
1166 | clk = clk_register_gate(NULL, "cml0", "pll_e", 0, clk_base + PLLE_AUX, | 1171 | clk = clk_register_gate(NULL, "cml0", "pll_e", 0, clk_base + PLLE_AUX, |
1167 | 0, 0, &cml_lock); | 1172 | 0, 0, &cml_lock); |