diff options
Diffstat (limited to 'drivers/clk/spear/spear1310_clock.c')
-rw-r--r-- | drivers/clk/spear/spear1310_clock.c | 49 |
1 files changed, 25 insertions, 24 deletions
diff --git a/drivers/clk/spear/spear1310_clock.c b/drivers/clk/spear/spear1310_clock.c index e84b1fbb5838..2809b670e22c 100644 --- a/drivers/clk/spear/spear1310_clock.c +++ b/drivers/clk/spear/spear1310_clock.c | |||
@@ -483,7 +483,8 @@ void __init spear1310_clk_init(void) | |||
483 | clk_register_clkdev(clk, "ddr_clk", NULL); | 483 | clk_register_clkdev(clk, "ddr_clk", NULL); |
484 | 484 | ||
485 | /* clock derived from pll1 clk */ | 485 | /* clock derived from pll1 clk */ |
486 | clk = clk_register_fixed_factor(NULL, "cpu_clk", "pll1_clk", 0, 1, 2); | 486 | clk = clk_register_fixed_factor(NULL, "cpu_clk", "pll1_clk", |
487 | CLK_SET_RATE_PARENT, 1, 2); | ||
487 | clk_register_clkdev(clk, "cpu_clk", NULL); | 488 | clk_register_clkdev(clk, "cpu_clk", NULL); |
488 | 489 | ||
489 | clk = clk_register_fixed_factor(NULL, "wdt_clk", "cpu_clk", 0, 1, | 490 | clk = clk_register_fixed_factor(NULL, "wdt_clk", "cpu_clk", 0, 1, |
@@ -547,14 +548,14 @@ void __init spear1310_clk_init(void) | |||
547 | clk_register_clkdev(clk1, "uart_syn_gclk", NULL); | 548 | clk_register_clkdev(clk1, "uart_syn_gclk", NULL); |
548 | 549 | ||
549 | clk = clk_register_mux(NULL, "uart0_mclk", uart0_parents, | 550 | clk = clk_register_mux(NULL, "uart0_mclk", uart0_parents, |
550 | ARRAY_SIZE(uart0_parents), 0, SPEAR1310_PERIP_CLK_CFG, | 551 | ARRAY_SIZE(uart0_parents), CLK_SET_RATE_PARENT, |
551 | SPEAR1310_UART_CLK_SHIFT, SPEAR1310_UART_CLK_MASK, 0, | 552 | SPEAR1310_PERIP_CLK_CFG, SPEAR1310_UART_CLK_SHIFT, |
552 | &_lock); | 553 | SPEAR1310_UART_CLK_MASK, 0, &_lock); |
553 | clk_register_clkdev(clk, "uart0_mclk", NULL); | 554 | clk_register_clkdev(clk, "uart0_mclk", NULL); |
554 | 555 | ||
555 | clk = clk_register_gate(NULL, "uart0_clk", "uart0_mclk", 0, | 556 | clk = clk_register_gate(NULL, "uart0_clk", "uart0_mclk", |
556 | SPEAR1310_PERIP1_CLK_ENB, SPEAR1310_UART_CLK_ENB, 0, | 557 | CLK_SET_RATE_PARENT, SPEAR1310_PERIP1_CLK_ENB, |
557 | &_lock); | 558 | SPEAR1310_UART_CLK_ENB, 0, &_lock); |
558 | clk_register_clkdev(clk, NULL, "e0000000.serial"); | 559 | clk_register_clkdev(clk, NULL, "e0000000.serial"); |
559 | 560 | ||
560 | clk = clk_register_aux("sdhci_syn_clk", "sdhci_syn_gclk", | 561 | clk = clk_register_aux("sdhci_syn_clk", "sdhci_syn_gclk", |
@@ -563,9 +564,9 @@ void __init spear1310_clk_init(void) | |||
563 | clk_register_clkdev(clk, "sdhci_syn_clk", NULL); | 564 | clk_register_clkdev(clk, "sdhci_syn_clk", NULL); |
564 | clk_register_clkdev(clk1, "sdhci_syn_gclk", NULL); | 565 | clk_register_clkdev(clk1, "sdhci_syn_gclk", NULL); |
565 | 566 | ||
566 | clk = clk_register_gate(NULL, "sdhci_clk", "sdhci_syn_gclk", 0, | 567 | clk = clk_register_gate(NULL, "sdhci_clk", "sdhci_syn_gclk", |
567 | SPEAR1310_PERIP1_CLK_ENB, SPEAR1310_SDHCI_CLK_ENB, 0, | 568 | CLK_SET_RATE_PARENT, SPEAR1310_PERIP1_CLK_ENB, |
568 | &_lock); | 569 | SPEAR1310_SDHCI_CLK_ENB, 0, &_lock); |
569 | clk_register_clkdev(clk, NULL, "b3000000.sdhci"); | 570 | clk_register_clkdev(clk, NULL, "b3000000.sdhci"); |
570 | 571 | ||
571 | clk = clk_register_aux("cfxd_syn_clk", "cfxd_syn_gclk", "vco1div2_clk", | 572 | clk = clk_register_aux("cfxd_syn_clk", "cfxd_syn_gclk", "vco1div2_clk", |
@@ -574,9 +575,9 @@ void __init spear1310_clk_init(void) | |||
574 | clk_register_clkdev(clk, "cfxd_syn_clk", NULL); | 575 | clk_register_clkdev(clk, "cfxd_syn_clk", NULL); |
575 | clk_register_clkdev(clk1, "cfxd_syn_gclk", NULL); | 576 | clk_register_clkdev(clk1, "cfxd_syn_gclk", NULL); |
576 | 577 | ||
577 | clk = clk_register_gate(NULL, "cfxd_clk", "cfxd_syn_gclk", 0, | 578 | clk = clk_register_gate(NULL, "cfxd_clk", "cfxd_syn_gclk", |
578 | SPEAR1310_PERIP1_CLK_ENB, SPEAR1310_CFXD_CLK_ENB, 0, | 579 | CLK_SET_RATE_PARENT, SPEAR1310_PERIP1_CLK_ENB, |
579 | &_lock); | 580 | SPEAR1310_CFXD_CLK_ENB, 0, &_lock); |
580 | clk_register_clkdev(clk, NULL, "b2800000.cf"); | 581 | clk_register_clkdev(clk, NULL, "b2800000.cf"); |
581 | clk_register_clkdev(clk, NULL, "arasan_xd"); | 582 | clk_register_clkdev(clk, NULL, "arasan_xd"); |
582 | 583 | ||
@@ -587,9 +588,9 @@ void __init spear1310_clk_init(void) | |||
587 | clk_register_clkdev(clk1, "c3_syn_gclk", NULL); | 588 | clk_register_clkdev(clk1, "c3_syn_gclk", NULL); |
588 | 589 | ||
589 | clk = clk_register_mux(NULL, "c3_mclk", c3_parents, | 590 | clk = clk_register_mux(NULL, "c3_mclk", c3_parents, |
590 | ARRAY_SIZE(c3_parents), 0, SPEAR1310_PERIP_CLK_CFG, | 591 | ARRAY_SIZE(c3_parents), CLK_SET_RATE_PARENT, |
591 | SPEAR1310_C3_CLK_SHIFT, SPEAR1310_C3_CLK_MASK, 0, | 592 | SPEAR1310_PERIP_CLK_CFG, SPEAR1310_C3_CLK_SHIFT, |
592 | &_lock); | 593 | SPEAR1310_C3_CLK_MASK, 0, &_lock); |
593 | clk_register_clkdev(clk, "c3_mclk", NULL); | 594 | clk_register_clkdev(clk, "c3_mclk", NULL); |
594 | 595 | ||
595 | clk = clk_register_gate(NULL, "c3_clk", "c3_mclk", 0, | 596 | clk = clk_register_gate(NULL, "c3_clk", "c3_mclk", 0, |
@@ -630,7 +631,7 @@ void __init spear1310_clk_init(void) | |||
630 | clk_register_clkdev(clk, "clcd_syn_clk", NULL); | 631 | clk_register_clkdev(clk, "clcd_syn_clk", NULL); |
631 | 632 | ||
632 | clk = clk_register_mux(NULL, "clcd_pixel_mclk", clcd_pixel_parents, | 633 | clk = clk_register_mux(NULL, "clcd_pixel_mclk", clcd_pixel_parents, |
633 | ARRAY_SIZE(clcd_pixel_parents), 0, | 634 | ARRAY_SIZE(clcd_pixel_parents), CLK_SET_RATE_PARENT, |
634 | SPEAR1310_PERIP_CLK_CFG, SPEAR1310_CLCD_CLK_SHIFT, | 635 | SPEAR1310_PERIP_CLK_CFG, SPEAR1310_CLCD_CLK_SHIFT, |
635 | SPEAR1310_CLCD_CLK_MASK, 0, &_lock); | 636 | SPEAR1310_CLCD_CLK_MASK, 0, &_lock); |
636 | clk_register_clkdev(clk, "clcd_pixel_mclk", NULL); | 637 | clk_register_clkdev(clk, "clcd_pixel_mclk", NULL); |
@@ -653,10 +654,10 @@ void __init spear1310_clk_init(void) | |||
653 | clk_register_clkdev(clk, "i2s_prs1_clk", NULL); | 654 | clk_register_clkdev(clk, "i2s_prs1_clk", NULL); |
654 | 655 | ||
655 | clk = clk_register_mux(NULL, "i2s_ref_mclk", i2s_ref_parents, | 656 | clk = clk_register_mux(NULL, "i2s_ref_mclk", i2s_ref_parents, |
656 | ARRAY_SIZE(i2s_ref_parents), 0, SPEAR1310_I2S_CLK_CFG, | 657 | ARRAY_SIZE(i2s_ref_parents), CLK_SET_RATE_PARENT, |
657 | SPEAR1310_I2S_REF_SHIFT, SPEAR1310_I2S_REF_SEL_MASK, 0, | 658 | SPEAR1310_I2S_CLK_CFG, SPEAR1310_I2S_REF_SHIFT, |
658 | &_lock); | 659 | SPEAR1310_I2S_REF_SEL_MASK, 0, &_lock); |
659 | clk_register_clkdev(clk, "i2s_ref_clk", NULL); | 660 | clk_register_clkdev(clk, "i2s_ref_mclk", NULL); |
660 | 661 | ||
661 | clk = clk_register_gate(NULL, "i2s_ref_pad_clk", "i2s_ref_mclk", 0, | 662 | clk = clk_register_gate(NULL, "i2s_ref_pad_clk", "i2s_ref_mclk", 0, |
662 | SPEAR1310_PERIP2_CLK_ENB, SPEAR1310_I2S_REF_PAD_CLK_ENB, | 663 | SPEAR1310_PERIP2_CLK_ENB, SPEAR1310_I2S_REF_PAD_CLK_ENB, |
@@ -753,9 +754,9 @@ void __init spear1310_clk_init(void) | |||
753 | clk_register_clkdev(clk, "adc_syn_clk", NULL); | 754 | clk_register_clkdev(clk, "adc_syn_clk", NULL); |
754 | clk_register_clkdev(clk1, "adc_syn_gclk", NULL); | 755 | clk_register_clkdev(clk1, "adc_syn_gclk", NULL); |
755 | 756 | ||
756 | clk = clk_register_gate(NULL, "adc_clk", "adc_syn_gclk", 0, | 757 | clk = clk_register_gate(NULL, "adc_clk", "adc_syn_gclk", |
757 | SPEAR1310_PERIP1_CLK_ENB, SPEAR1310_ADC_CLK_ENB, 0, | 758 | CLK_SET_RATE_PARENT, SPEAR1310_PERIP1_CLK_ENB, |
758 | &_lock); | 759 | SPEAR1310_ADC_CLK_ENB, 0, &_lock); |
759 | clk_register_clkdev(clk, NULL, "e0080000.adc"); | 760 | clk_register_clkdev(clk, NULL, "e0080000.adc"); |
760 | 761 | ||
761 | /* clock derived from apb clk */ | 762 | /* clock derived from apb clk */ |