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path: root/drivers/clk/samsung/clk-exynos4.c
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Diffstat (limited to 'drivers/clk/samsung/clk-exynos4.c')
-rw-r--r--drivers/clk/samsung/clk-exynos4.c6
1 files changed, 4 insertions, 2 deletions
diff --git a/drivers/clk/samsung/clk-exynos4.c b/drivers/clk/samsung/clk-exynos4.c
index d0940e69d034..3c1f88868f29 100644
--- a/drivers/clk/samsung/clk-exynos4.c
+++ b/drivers/clk/samsung/clk-exynos4.c
@@ -791,7 +791,8 @@ struct samsung_gate_clock exynos4210_gate_clks[] __initdata = {
791 GATE(smmu_pcie, "smmu_pcie", "aclk133", GATE_IP_FSYS, 18, 0, 0), 791 GATE(smmu_pcie, "smmu_pcie", "aclk133", GATE_IP_FSYS, 18, 0, 0),
792 GATE(modemif, "modemif", "aclk100", GATE_IP_PERIL, 28, 0, 0), 792 GATE(modemif, "modemif", "aclk100", GATE_IP_PERIL, 28, 0, 0),
793 GATE(chipid, "chipid", "aclk100", E4210_GATE_IP_PERIR, 0, 0, 0), 793 GATE(chipid, "chipid", "aclk100", E4210_GATE_IP_PERIR, 0, 0, 0),
794 GATE(sysreg, "sysreg", "aclk100", E4210_GATE_IP_PERIR, 0, 0, 0), 794 GATE(sysreg, "sysreg", "aclk100", E4210_GATE_IP_PERIR, 0,
795 CLK_IGNORE_UNUSED, 0),
795 GATE(hdmi_cec, "hdmi_cec", "aclk100", E4210_GATE_IP_PERIR, 11, 0, 0), 796 GATE(hdmi_cec, "hdmi_cec", "aclk100", E4210_GATE_IP_PERIR, 11, 0, 0),
796 GATE(smmu_rotator, "smmu_rotator", "aclk200", 797 GATE(smmu_rotator, "smmu_rotator", "aclk200",
797 E4210_GATE_IP_IMAGE, 4, 0, 0), 798 E4210_GATE_IP_IMAGE, 4, 0, 0),
@@ -819,7 +820,8 @@ struct samsung_gate_clock exynos4x12_gate_clks[] __initdata = {
819 GATE(smmu_mdma, "smmu_mdma", "aclk200", E4X12_GATE_IP_IMAGE, 5, 0, 0), 820 GATE(smmu_mdma, "smmu_mdma", "aclk200", E4X12_GATE_IP_IMAGE, 5, 0, 0),
820 GATE(mipi_hsi, "mipi_hsi", "aclk133", GATE_IP_FSYS, 10, 0, 0), 821 GATE(mipi_hsi, "mipi_hsi", "aclk133", GATE_IP_FSYS, 10, 0, 0),
821 GATE(chipid, "chipid", "aclk100", E4X12_GATE_IP_PERIR, 0, 0, 0), 822 GATE(chipid, "chipid", "aclk100", E4X12_GATE_IP_PERIR, 0, 0, 0),
822 GATE(sysreg, "sysreg", "aclk100", E4X12_GATE_IP_PERIR, 1, 0, 0), 823 GATE(sysreg, "sysreg", "aclk100", E4X12_GATE_IP_PERIR, 1,
824 CLK_IGNORE_UNUSED, 0),
823 GATE(hdmi_cec, "hdmi_cec", "aclk100", E4X12_GATE_IP_PERIR, 11, 0, 0), 825 GATE(hdmi_cec, "hdmi_cec", "aclk100", E4X12_GATE_IP_PERIR, 11, 0, 0),
824 GATE(sclk_mdnie0, "sclk_mdnie0", "div_mdnie0", 826 GATE(sclk_mdnie0, "sclk_mdnie0", "div_mdnie0",
825 SRC_MASK_LCD0, 4, CLK_SET_RATE_PARENT, 0), 827 SRC_MASK_LCD0, 4, CLK_SET_RATE_PARENT, 0),