diff options
Diffstat (limited to 'drivers/clk/mmp/clk-apmu.c')
-rw-r--r-- | drivers/clk/mmp/clk-apmu.c | 97 |
1 files changed, 97 insertions, 0 deletions
diff --git a/drivers/clk/mmp/clk-apmu.c b/drivers/clk/mmp/clk-apmu.c new file mode 100644 index 000000000000..abe182b2377f --- /dev/null +++ b/drivers/clk/mmp/clk-apmu.c | |||
@@ -0,0 +1,97 @@ | |||
1 | /* | ||
2 | * mmp AXI peripharal clock operation source file | ||
3 | * | ||
4 | * Copyright (C) 2012 Marvell | ||
5 | * Chao Xie <xiechao.mail@gmail.com> | ||
6 | * | ||
7 | * This file is licensed under the terms of the GNU General Public | ||
8 | * License version 2. This program is licensed "as is" without any | ||
9 | * warranty of any kind, whether express or implied. | ||
10 | */ | ||
11 | |||
12 | #include <linux/kernel.h> | ||
13 | #include <linux/clk.h> | ||
14 | #include <linux/io.h> | ||
15 | #include <linux/err.h> | ||
16 | #include <linux/delay.h> | ||
17 | #include <linux/slab.h> | ||
18 | |||
19 | #include "clk.h" | ||
20 | |||
21 | #define to_clk_apmu(clk) (container_of(clk, struct clk_apmu, clk)) | ||
22 | struct clk_apmu { | ||
23 | struct clk_hw hw; | ||
24 | void __iomem *base; | ||
25 | u32 rst_mask; | ||
26 | u32 enable_mask; | ||
27 | spinlock_t *lock; | ||
28 | }; | ||
29 | |||
30 | static int clk_apmu_enable(struct clk_hw *hw) | ||
31 | { | ||
32 | struct clk_apmu *apmu = to_clk_apmu(hw); | ||
33 | unsigned long data; | ||
34 | unsigned long flags = 0; | ||
35 | |||
36 | if (apmu->lock) | ||
37 | spin_lock_irqsave(apmu->lock, flags); | ||
38 | |||
39 | data = readl_relaxed(apmu->base) | apmu->enable_mask; | ||
40 | writel_relaxed(data, apmu->base); | ||
41 | |||
42 | if (apmu->lock) | ||
43 | spin_unlock_irqrestore(apmu->lock, flags); | ||
44 | |||
45 | return 0; | ||
46 | } | ||
47 | |||
48 | static void clk_apmu_disable(struct clk_hw *hw) | ||
49 | { | ||
50 | struct clk_apmu *apmu = to_clk_apmu(hw); | ||
51 | unsigned long data; | ||
52 | unsigned long flags = 0; | ||
53 | |||
54 | if (apmu->lock) | ||
55 | spin_lock_irqsave(apmu->lock, flags); | ||
56 | |||
57 | data = readl_relaxed(apmu->base) & ~apmu->enable_mask; | ||
58 | writel_relaxed(data, apmu->base); | ||
59 | |||
60 | if (apmu->lock) | ||
61 | spin_unlock_irqrestore(apmu->lock, flags); | ||
62 | } | ||
63 | |||
64 | struct clk_ops clk_apmu_ops = { | ||
65 | .enable = clk_apmu_enable, | ||
66 | .disable = clk_apmu_disable, | ||
67 | }; | ||
68 | |||
69 | struct clk *mmp_clk_register_apmu(const char *name, const char *parent_name, | ||
70 | void __iomem *base, u32 enable_mask, spinlock_t *lock) | ||
71 | { | ||
72 | struct clk_apmu *apmu; | ||
73 | struct clk *clk; | ||
74 | struct clk_init_data init; | ||
75 | |||
76 | apmu = kzalloc(sizeof(*apmu), GFP_KERNEL); | ||
77 | if (!apmu) | ||
78 | return NULL; | ||
79 | |||
80 | init.name = name; | ||
81 | init.ops = &clk_apmu_ops; | ||
82 | init.flags = CLK_SET_RATE_PARENT; | ||
83 | init.parent_names = (parent_name ? &parent_name : NULL); | ||
84 | init.num_parents = (parent_name ? 1 : 0); | ||
85 | |||
86 | apmu->base = base; | ||
87 | apmu->enable_mask = enable_mask; | ||
88 | apmu->lock = lock; | ||
89 | apmu->hw.init = &init; | ||
90 | |||
91 | clk = clk_register(NULL, &apmu->hw); | ||
92 | |||
93 | if (IS_ERR(clk)) | ||
94 | kfree(apmu); | ||
95 | |||
96 | return clk; | ||
97 | } | ||