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path: root/drivers/clk/clk-gate.c
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Diffstat (limited to 'drivers/clk/clk-gate.c')
-rw-r--r--drivers/clk/clk-gate.c104
1 files changed, 52 insertions, 52 deletions
diff --git a/drivers/clk/clk-gate.c b/drivers/clk/clk-gate.c
index b5902e2ef2fd..578465e04be6 100644
--- a/drivers/clk/clk-gate.c
+++ b/drivers/clk/clk-gate.c
@@ -28,32 +28,38 @@
28 28
29#define to_clk_gate(_hw) container_of(_hw, struct clk_gate, hw) 29#define to_clk_gate(_hw) container_of(_hw, struct clk_gate, hw)
30 30
31static void clk_gate_set_bit(struct clk_gate *gate) 31/*
32 * It works on following logic:
33 *
34 * For enabling clock, enable = 1
35 * set2dis = 1 -> clear bit -> set = 0
36 * set2dis = 0 -> set bit -> set = 1
37 *
38 * For disabling clock, enable = 0
39 * set2dis = 1 -> set bit -> set = 1
40 * set2dis = 0 -> clear bit -> set = 0
41 *
42 * So, result is always: enable xor set2dis.
43 */
44static void clk_gate_endisable(struct clk_hw *hw, int enable)
32{ 45{
33 u32 reg; 46 struct clk_gate *gate = to_clk_gate(hw);
47 int set = gate->flags & CLK_GATE_SET_TO_DISABLE ? 1 : 0;
34 unsigned long flags = 0; 48 unsigned long flags = 0;
49 u32 reg;
50
51 set ^= enable;
35 52
36 if (gate->lock) 53 if (gate->lock)
37 spin_lock_irqsave(gate->lock, flags); 54 spin_lock_irqsave(gate->lock, flags);
38 55
39 reg = readl(gate->reg); 56 reg = readl(gate->reg);
40 reg |= BIT(gate->bit_idx);
41 writel(reg, gate->reg);
42
43 if (gate->lock)
44 spin_unlock_irqrestore(gate->lock, flags);
45}
46
47static void clk_gate_clear_bit(struct clk_gate *gate)
48{
49 u32 reg;
50 unsigned long flags = 0;
51 57
52 if (gate->lock) 58 if (set)
53 spin_lock_irqsave(gate->lock, flags); 59 reg |= BIT(gate->bit_idx);
60 else
61 reg &= ~BIT(gate->bit_idx);
54 62
55 reg = readl(gate->reg);
56 reg &= ~BIT(gate->bit_idx);
57 writel(reg, gate->reg); 63 writel(reg, gate->reg);
58 64
59 if (gate->lock) 65 if (gate->lock)
@@ -62,27 +68,15 @@ static void clk_gate_clear_bit(struct clk_gate *gate)
62 68
63static int clk_gate_enable(struct clk_hw *hw) 69static int clk_gate_enable(struct clk_hw *hw)
64{ 70{
65 struct clk_gate *gate = to_clk_gate(hw); 71 clk_gate_endisable(hw, 1);
66
67 if (gate->flags & CLK_GATE_SET_TO_DISABLE)
68 clk_gate_clear_bit(gate);
69 else
70 clk_gate_set_bit(gate);
71 72
72 return 0; 73 return 0;
73} 74}
74EXPORT_SYMBOL_GPL(clk_gate_enable);
75 75
76static void clk_gate_disable(struct clk_hw *hw) 76static void clk_gate_disable(struct clk_hw *hw)
77{ 77{
78 struct clk_gate *gate = to_clk_gate(hw); 78 clk_gate_endisable(hw, 0);
79
80 if (gate->flags & CLK_GATE_SET_TO_DISABLE)
81 clk_gate_set_bit(gate);
82 else
83 clk_gate_clear_bit(gate);
84} 79}
85EXPORT_SYMBOL_GPL(clk_gate_disable);
86 80
87static int clk_gate_is_enabled(struct clk_hw *hw) 81static int clk_gate_is_enabled(struct clk_hw *hw)
88{ 82{
@@ -99,15 +93,25 @@ static int clk_gate_is_enabled(struct clk_hw *hw)
99 93
100 return reg ? 1 : 0; 94 return reg ? 1 : 0;
101} 95}
102EXPORT_SYMBOL_GPL(clk_gate_is_enabled);
103 96
104struct clk_ops clk_gate_ops = { 97const struct clk_ops clk_gate_ops = {
105 .enable = clk_gate_enable, 98 .enable = clk_gate_enable,
106 .disable = clk_gate_disable, 99 .disable = clk_gate_disable,
107 .is_enabled = clk_gate_is_enabled, 100 .is_enabled = clk_gate_is_enabled,
108}; 101};
109EXPORT_SYMBOL_GPL(clk_gate_ops); 102EXPORT_SYMBOL_GPL(clk_gate_ops);
110 103
104/**
105 * clk_register_gate - register a gate clock with the clock framework
106 * @dev: device that is registering this clock
107 * @name: name of this clock
108 * @parent_name: name of this clock's parent
109 * @flags: framework-specific flags for this clock
110 * @reg: register address to control gating of this clock
111 * @bit_idx: which bit in the register controls gating of this clock
112 * @clk_gate_flags: gate-specific flags for this clock
113 * @lock: shared register lock for this clock
114 */
111struct clk *clk_register_gate(struct device *dev, const char *name, 115struct clk *clk_register_gate(struct device *dev, const char *name,
112 const char *parent_name, unsigned long flags, 116 const char *parent_name, unsigned long flags,
113 void __iomem *reg, u8 bit_idx, 117 void __iomem *reg, u8 bit_idx,
@@ -115,36 +119,32 @@ struct clk *clk_register_gate(struct device *dev, const char *name,
115{ 119{
116 struct clk_gate *gate; 120 struct clk_gate *gate;
117 struct clk *clk; 121 struct clk *clk;
122 struct clk_init_data init;
118 123
124 /* allocate the gate */
119 gate = kzalloc(sizeof(struct clk_gate), GFP_KERNEL); 125 gate = kzalloc(sizeof(struct clk_gate), GFP_KERNEL);
120
121 if (!gate) { 126 if (!gate) {
122 pr_err("%s: could not allocate gated clk\n", __func__); 127 pr_err("%s: could not allocate gated clk\n", __func__);
123 return NULL; 128 return ERR_PTR(-ENOMEM);
124 } 129 }
125 130
131 init.name = name;
132 init.ops = &clk_gate_ops;
133 init.flags = flags;
134 init.parent_names = (parent_name ? &parent_name: NULL);
135 init.num_parents = (parent_name ? 1 : 0);
136
126 /* struct clk_gate assignments */ 137 /* struct clk_gate assignments */
127 gate->reg = reg; 138 gate->reg = reg;
128 gate->bit_idx = bit_idx; 139 gate->bit_idx = bit_idx;
129 gate->flags = clk_gate_flags; 140 gate->flags = clk_gate_flags;
130 gate->lock = lock; 141 gate->lock = lock;
142 gate->hw.init = &init;
131 143
132 if (parent_name) { 144 clk = clk_register(dev, &gate->hw);
133 gate->parent[0] = kstrdup(parent_name, GFP_KERNEL); 145
134 if (!gate->parent[0]) 146 if (IS_ERR(clk))
135 goto out; 147 kfree(gate);
136 }
137 148
138 clk = clk_register(dev, name, 149 return clk;
139 &clk_gate_ops, &gate->hw,
140 gate->parent,
141 (parent_name ? 1 : 0),
142 flags);
143 if (clk)
144 return clk;
145out:
146 kfree(gate->parent[0]);
147 kfree(gate);
148
149 return NULL;
150} 150}