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path: root/drivers/clk/clk-divider.c
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Diffstat (limited to 'drivers/clk/clk-divider.c')
-rw-r--r--drivers/clk/clk-divider.c8
1 files changed, 5 insertions, 3 deletions
diff --git a/drivers/clk/clk-divider.c b/drivers/clk/clk-divider.c
index 6d55eb2cb959..8d3009e44fba 100644
--- a/drivers/clk/clk-divider.c
+++ b/drivers/clk/clk-divider.c
@@ -104,7 +104,7 @@ static unsigned long clk_divider_recalc_rate(struct clk_hw *hw,
104 struct clk_divider *divider = to_clk_divider(hw); 104 struct clk_divider *divider = to_clk_divider(hw);
105 unsigned int div, val; 105 unsigned int div, val;
106 106
107 val = readl(divider->reg) >> divider->shift; 107 val = clk_readl(divider->reg) >> divider->shift;
108 val &= div_mask(divider); 108 val &= div_mask(divider);
109 109
110 div = _get_div(divider, val); 110 div = _get_div(divider, val);
@@ -230,11 +230,11 @@ static int clk_divider_set_rate(struct clk_hw *hw, unsigned long rate,
230 if (divider->flags & CLK_DIVIDER_HIWORD_MASK) { 230 if (divider->flags & CLK_DIVIDER_HIWORD_MASK) {
231 val = div_mask(divider) << (divider->shift + 16); 231 val = div_mask(divider) << (divider->shift + 16);
232 } else { 232 } else {
233 val = readl(divider->reg); 233 val = clk_readl(divider->reg);
234 val &= ~(div_mask(divider) << divider->shift); 234 val &= ~(div_mask(divider) << divider->shift);
235 } 235 }
236 val |= value << divider->shift; 236 val |= value << divider->shift;
237 writel(val, divider->reg); 237 clk_writel(val, divider->reg);
238 238
239 if (divider->lock) 239 if (divider->lock)
240 spin_unlock_irqrestore(divider->lock, flags); 240 spin_unlock_irqrestore(divider->lock, flags);
@@ -317,6 +317,7 @@ struct clk *clk_register_divider(struct device *dev, const char *name,
317 return _register_divider(dev, name, parent_name, flags, reg, shift, 317 return _register_divider(dev, name, parent_name, flags, reg, shift,
318 width, clk_divider_flags, NULL, lock); 318 width, clk_divider_flags, NULL, lock);
319} 319}
320EXPORT_SYMBOL_GPL(clk_register_divider);
320 321
321/** 322/**
322 * clk_register_divider_table - register a table based divider clock with 323 * clk_register_divider_table - register a table based divider clock with
@@ -341,3 +342,4 @@ struct clk *clk_register_divider_table(struct device *dev, const char *name,
341 return _register_divider(dev, name, parent_name, flags, reg, shift, 342 return _register_divider(dev, name, parent_name, flags, reg, shift,
342 width, clk_divider_flags, table, lock); 343 width, clk_divider_flags, table, lock);
343} 344}
345EXPORT_SYMBOL_GPL(clk_register_divider_table);