diff options
Diffstat (limited to 'drivers/char')
-rw-r--r-- | drivers/char/agp/intel-gtt.c | 14 |
1 files changed, 10 insertions, 4 deletions
diff --git a/drivers/char/agp/intel-gtt.c b/drivers/char/agp/intel-gtt.c index 791582c73ff7..ebdeab26ee3c 100644 --- a/drivers/char/agp/intel-gtt.c +++ b/drivers/char/agp/intel-gtt.c | |||
@@ -98,6 +98,7 @@ static struct _intel_private { | |||
98 | u8 __iomem *registers; | 98 | u8 __iomem *registers; |
99 | phys_addr_t gtt_bus_addr; | 99 | phys_addr_t gtt_bus_addr; |
100 | phys_addr_t gma_bus_addr; | 100 | phys_addr_t gma_bus_addr; |
101 | phys_addr_t pte_bus_addr; | ||
101 | u32 __iomem *gtt; /* I915G */ | 102 | u32 __iomem *gtt; /* I915G */ |
102 | int num_dcache_entries; | 103 | int num_dcache_entries; |
103 | union { | 104 | union { |
@@ -896,11 +897,9 @@ static void intel_i830_chipset_flush(struct agp_bridge_data *bridge) | |||
896 | 897 | ||
897 | static void intel_enable_gtt(void) | 898 | static void intel_enable_gtt(void) |
898 | { | 899 | { |
899 | u32 ptetbl_addr, gma_addr; | 900 | u32 gma_addr; |
900 | u16 gmch_ctrl; | 901 | u16 gmch_ctrl; |
901 | 902 | ||
902 | ptetbl_addr = readl(intel_private.registers+I810_PGETBL_CTL) & 0xfffff000; | ||
903 | |||
904 | if (INTEL_GTT_GEN == 2) | 903 | if (INTEL_GTT_GEN == 2) |
905 | pci_read_config_dword(intel_private.pcidev, I810_GMADDR, | 904 | pci_read_config_dword(intel_private.pcidev, I810_GMADDR, |
906 | &gma_addr); | 905 | &gma_addr); |
@@ -914,7 +913,8 @@ static void intel_enable_gtt(void) | |||
914 | gmch_ctrl |= I830_GMCH_ENABLED; | 913 | gmch_ctrl |= I830_GMCH_ENABLED; |
915 | pci_write_config_word(intel_private.bridge_dev, I830_GMCH_CTRL, gmch_ctrl); | 914 | pci_write_config_word(intel_private.bridge_dev, I830_GMCH_CTRL, gmch_ctrl); |
916 | 915 | ||
917 | writel(ptetbl_addr|I810_PGETBL_ENABLED, intel_private.registers+I810_PGETBL_CTL); | 916 | writel(intel_private.pte_bus_addr|I810_PGETBL_ENABLED, |
917 | intel_private.registers+I810_PGETBL_CTL); | ||
918 | readl(intel_private.registers+I810_PGETBL_CTL); /* PCI Posting. */ | 918 | readl(intel_private.registers+I810_PGETBL_CTL); /* PCI Posting. */ |
919 | } | 919 | } |
920 | 920 | ||
@@ -930,6 +930,8 @@ static int i830_setup(void) | |||
930 | return -ENOMEM; | 930 | return -ENOMEM; |
931 | 931 | ||
932 | intel_private.gtt_bus_addr = reg_addr + I810_PTE_BASE; | 932 | intel_private.gtt_bus_addr = reg_addr + I810_PTE_BASE; |
933 | intel_private.pte_bus_addr = | ||
934 | readl(intel_private.registers+I810_PGETBL_CTL) & 0xfffff000; | ||
933 | 935 | ||
934 | intel_i830_setup_flush(); | 936 | intel_i830_setup_flush(); |
935 | 937 | ||
@@ -1279,6 +1281,7 @@ static int i9xx_setup(void) | |||
1279 | 1281 | ||
1280 | if (INTEL_GTT_GEN == 3) { | 1282 | if (INTEL_GTT_GEN == 3) { |
1281 | u32 gtt_addr; | 1283 | u32 gtt_addr; |
1284 | |||
1282 | pci_read_config_dword(intel_private.pcidev, | 1285 | pci_read_config_dword(intel_private.pcidev, |
1283 | I915_PTEADDR, >t_addr); | 1286 | I915_PTEADDR, >t_addr); |
1284 | intel_private.gtt_bus_addr = gtt_addr; | 1287 | intel_private.gtt_bus_addr = gtt_addr; |
@@ -1298,6 +1301,9 @@ static int i9xx_setup(void) | |||
1298 | intel_private.gtt_bus_addr = reg_addr + gtt_offset; | 1301 | intel_private.gtt_bus_addr = reg_addr + gtt_offset; |
1299 | } | 1302 | } |
1300 | 1303 | ||
1304 | intel_private.pte_bus_addr = | ||
1305 | readl(intel_private.registers+I810_PGETBL_CTL) & 0xfffff000; | ||
1306 | |||
1301 | intel_i9xx_setup_flush(); | 1307 | intel_i9xx_setup_flush(); |
1302 | 1308 | ||
1303 | return 0; | 1309 | return 0; |