2 files changed, 30 insertions, 74 deletions
diff --git a/drivers/char/watchdog/i6300esb.c b/drivers/char/watchdog/i6300esb.c
index 575d6cd9e59a..93785f13242e 100644
--- a/drivers/char/watchdog/i6300esb.c
+++ b/drivers/char/watchdog/i6300esb.c
@@ -1,20 +1,15 @@
 /*
- *      i6300esb 0.03:  Watchdog timer driver for Intel 6300ESB chipset
+ *      i6300esb:       Watchdog timer driver for Intel 6300ESB chipset
 *
 *      (c) Copyright 2004 Google Inc.
+ *      (c) Copyright 2005 David Härdeman <david@2gen.com>
 *
 *      This program is free software; you can redistribute it and/or
 *      modify it under the terms of the GNU General Public License
 *      as published by the Free Software Foundation; either version
 *      2 of the License, or (at your option) any later version.
 *
- *      based on i810-tco.c which is
+ *      based on i810-tco.c which is in turn based on softdog.c
- *
- *      (c) Copyright 2000      kernel concepts <nils@kernelconcepts.de>
- *                              developed for
- *                              Jentro AG, Haar/Munich (Germany)
- *
- *      which is in turn based on softdog.c by Alan Cox <alan@redhat.com>
 *
 *      The timer is implemented in the following I/O controller hubs:
 *      (See the intel documentation on http://developer.intel.com.)
@@ -47,14 +42,39 @@
 #include <asm/uaccess.h>
 #include <asm/io.h>
-#include "i6300esb.h"
 /* Module and version information */
 #define ESB_VERSION "0.03"
 #define ESB_MODULE_NAME "i6300ESB timer"
 #define ESB_DRIVER_NAME ESB_MODULE_NAME ", v" ESB_VERSION
 #define PFX ESB_MODULE_NAME ": "
+/* PCI configuration registers */
+#define ESB_CONFIG_REG  0x60            /* Config register                   */
+#define ESB_LOCK_REG    0x68            /* WDT lock register                 */
+/* Memory mapped registers */
+#define ESB_TIMER1_REG  BASEADDR + 0x00 /* Timer1 value after each reset     */
+#define ESB_TIMER2_REG  BASEADDR + 0x04 /* Timer2 value after each reset     */
+#define ESB_GINTSR_REG  BASEADDR + 0x08 /* General Interrupt Status Register */
+#define ESB_RELOAD_REG  BASEADDR + 0x0c /* Reload register                   */
+/* Lock register bits */
+#define ESB_WDT_FUNC    ( 0x01 << 2 )   /* Watchdog functionality            */
+#define ESB_WDT_ENABLE  ( 0x01 << 1 )   /* Enable WDT                        */
+#define ESB_WDT_LOCK    ( 0x01 << 0 )   /* Lock (nowayout)                   */
+/* Config register bits */
+#define ESB_WDT_REBOOT  ( 0x01 << 5 )   /* Enable reboot on timeout          */
+#define ESB_WDT_FREQ    ( 0x01 << 2 )   /* Decrement frequency               */
+#define ESB_WDT_INTTYPE ( 0x11 << 0 )   /* Interrupt type on timer1 timeout  */
+/* Reload register bits */
+#define ESB_WDT_RELOAD ( 0x01 << 8 )    /* prevent timeout                   */
+/* Magic constants */
+#define ESB_UNLOCK1     0x80            /* Step 1 to unlock reset registers  */
+#define ESB_UNLOCK2     0x86            /* Step 2 to unlock reset registers  */
 /* internal variables */
 static void __iomem *BASEADDR;
 static spinlock_t esb_lock; /* Guards the hardware */
diff --git a/drivers/char/watchdog/i6300esb.h b/drivers/char/watchdog/i6300esb.h
deleted file mode 100644
index 20c923bbb1c9..000000000000
--- a/drivers/char/watchdog/i6300esb.h
+++ /dev/null
@@ -1,64 +0,0 @@
-/*
- *      i6300esb:       Watchdog timer driver for Intel 6300ESB chipset
- *
- *      (c) Copyright 2000 kernel concepts <nils@kernelconcepts.de>, All Rights Reserved.
- *                              http://www.kernelconcepts.de
- *
- *      This program is free software; you can redistribute it and/or
- *      modify it under the terms of the GNU General Public License
- *      as published by the Free Software Foundation; either version
- *      2 of the License, or (at your option) any later version.
- *
- *      Neither kernel concepts nor Nils Faerber admit liability nor provide
- *      warranty for any of this software. This material is provided
- *      "AS-IS" and at no charge.
- *
- *      (c) Copyright 2000      kernel concepts <nils@kernelconcepts.de>
- *                              developed for
- *                              Jentro AG, Haar/Munich (Germany)
- *
- *      TCO timer driver for i8xx chipsets
- *      based on softdog.c by Alan Cox <alan@redhat.com>
- *
- *      For history and the complete list of supported I/O Controller Hub's
- *      see i8xx_tco.c
- */
-/*
- * Some address definitions for the TCO
- */
-/* PCI configuration registers */
-#define ESB_CONFIG_REG  0x60            /* Config register                   */
-#define ESB_LOCK_REG    0x68            /* WDT lock register                 */
-/* Memory mapped registers */
-#define ESB_TIMER1_REG  BASEADDR + 0x00 /* Timer1 value after each reset     */
-#define ESB_TIMER2_REG  BASEADDR + 0x04 /* Timer2 value after each reset     */
-#define ESB_GINTSR_REG  BASEADDR + 0x08 /* General Interrupt Status Register */
-#define ESB_RELOAD_REG  BASEADDR + 0x0c /* Reload register                   */
-/*
- * Some register bits
- */
-/* Lock register bits */
-#define ESB_WDT_FUNC    ( 0x01 << 2 )   /* Watchdog functionality            */
-#define ESB_WDT_ENABLE  ( 0x01 << 1 )   /* Enable WDT                        */
-#define ESB_WDT_LOCK    ( 0x01 << 0 )   /* Lock (nowayout)                   */
-/* Config register bits */
-#define ESB_WDT_REBOOT  ( 0x01 << 5 )   /* Enable reboot on timeout          */
-#define ESB_WDT_FREQ    ( 0x01 << 2 )   /* Decrement frequency               */
-#define ESB_WDT_INTTYPE ( 0x11 << 0 )   /* Interrupt type on timer1 timeout  */
-/* Reload register bits */
-#define ESB_WDT_RELOAD ( 0x01 << 8 )    /* prevent timeout                   */
-/*
- * Some magic constants
- */
-#define ESB_UNLOCK1     0x80            /* Step 1 to unlock reset registers  */
-#define ESB_UNLOCK2     0x86            /* Step 2 to unlock reset registers  */

diff --git a/drivers/char/watchdog/i6300esb.c b/drivers/char/watchdog/i6300esb.c index 575d6cd9e59a..93785f13242e 100644 --- a/drivers/char/watchdog/i6300esb.c +++ b/drivers/char/watchdog/i6300esb.c
@@ -1,20 +1,15 @@
1	/*	1	/*
2	* i6300esb 0.03: Watchdog timer driver for Intel 6300ESB chipset	2	* i6300esb: Watchdog timer driver for Intel 6300ESB chipset
3	*	3	*
4	* (c) Copyright 2004 Google Inc.	4	* (c) Copyright 2004 Google Inc.
		5	* (c) Copyright 2005 David Härdeman <david@2gen.com>
5	*	6	*
6	* This program is free software; you can redistribute it and/or	7	* This program is free software; you can redistribute it and/or
7	* modify it under the terms of the GNU General Public License	8	* modify it under the terms of the GNU General Public License
8	* as published by the Free Software Foundation; either version	9	* as published by the Free Software Foundation; either version
9	* 2 of the License, or (at your option) any later version.	10	* 2 of the License, or (at your option) any later version.
10	*	11	*
11	* based on i810-tco.c which is	12	* based on i810-tco.c which is in turn based on softdog.c
12	*
13	* (c) Copyright 2000 kernel concepts <nils@kernelconcepts.de>
14	* developed for
15	* Jentro AG, Haar/Munich (Germany)
16	*
17	* which is in turn based on softdog.c by Alan Cox <alan@redhat.com>
18	*	13	*
19	* The timer is implemented in the following I/O controller hubs:	14	* The timer is implemented in the following I/O controller hubs:
20	* (See the intel documentation on http://developer.intel.com.)	15	* (See the intel documentation on http://developer.intel.com.)
@@ -47,14 +42,39 @@
47	#include <asm/uaccess.h>	42	#include <asm/uaccess.h>
48	#include <asm/io.h>	43	#include <asm/io.h>
49		44
50	#include "i6300esb.h"
51
52	/* Module and version information */	45	/* Module and version information */
53	#define ESB_VERSION "0.03"	46	#define ESB_VERSION "0.03"
54	#define ESB_MODULE_NAME "i6300ESB timer"	47	#define ESB_MODULE_NAME "i6300ESB timer"
55	#define ESB_DRIVER_NAME ESB_MODULE_NAME ", v" ESB_VERSION	48	#define ESB_DRIVER_NAME ESB_MODULE_NAME ", v" ESB_VERSION
56	#define PFX ESB_MODULE_NAME ": "	49	#define PFX ESB_MODULE_NAME ": "
57		50
		51	/* PCI configuration registers */
		52	#define ESB_CONFIG_REG 0x60 /* Config register */
		53	#define ESB_LOCK_REG 0x68 /* WDT lock register */
		54
		55	/* Memory mapped registers */
		56	#define ESB_TIMER1_REG BASEADDR + 0x00 /* Timer1 value after each reset */
		57	#define ESB_TIMER2_REG BASEADDR + 0x04 /* Timer2 value after each reset */
		58	#define ESB_GINTSR_REG BASEADDR + 0x08 /* General Interrupt Status Register */
		59	#define ESB_RELOAD_REG BASEADDR + 0x0c /* Reload register */
		60
		61	/* Lock register bits */
		62	#define ESB_WDT_FUNC ( 0x01 << 2 ) /* Watchdog functionality */
		63	#define ESB_WDT_ENABLE ( 0x01 << 1 ) /* Enable WDT */
		64	#define ESB_WDT_LOCK ( 0x01 << 0 ) /* Lock (nowayout) */
		65
		66	/* Config register bits */
		67	#define ESB_WDT_REBOOT ( 0x01 << 5 ) /* Enable reboot on timeout */
		68	#define ESB_WDT_FREQ ( 0x01 << 2 ) /* Decrement frequency */
		69	#define ESB_WDT_INTTYPE ( 0x11 << 0 ) /* Interrupt type on timer1 timeout */
		70
		71	/* Reload register bits */
		72	#define ESB_WDT_RELOAD ( 0x01 << 8 ) /* prevent timeout */
		73
		74	/* Magic constants */
		75	#define ESB_UNLOCK1 0x80 /* Step 1 to unlock reset registers */
		76	#define ESB_UNLOCK2 0x86 /* Step 2 to unlock reset registers */
		77
58	/* internal variables */	78	/* internal variables */
59	static void __iomem *BASEADDR;	79	static void __iomem *BASEADDR;
60	static spinlock_t esb_lock; /* Guards the hardware */	80	static spinlock_t esb_lock; /* Guards the hardware */


diff --git a/drivers/char/watchdog/i6300esb.h b/drivers/char/watchdog/i6300esb.h deleted file mode 100644 index 20c923bbb1c9..000000000000 --- a/drivers/char/watchdog/i6300esb.h +++ /dev/null
@@ -1,64 +0,0 @@
1	/*
2	* i6300esb: Watchdog timer driver for Intel 6300ESB chipset
3	*
4	* (c) Copyright 2000 kernel concepts <nils@kernelconcepts.de>, All Rights Reserved.
5	* http://www.kernelconcepts.de
6	*
7	* This program is free software; you can redistribute it and/or
8	* modify it under the terms of the GNU General Public License
9	* as published by the Free Software Foundation; either version
10	* 2 of the License, or (at your option) any later version.
11	*
12	* Neither kernel concepts nor Nils Faerber admit liability nor provide
13	* warranty for any of this software. This material is provided
14	* "AS-IS" and at no charge.
15	*
16	* (c) Copyright 2000 kernel concepts <nils@kernelconcepts.de>
17	* developed for
18	* Jentro AG, Haar/Munich (Germany)
19	*
20	* TCO timer driver for i8xx chipsets
21	* based on softdog.c by Alan Cox <alan@redhat.com>
22	*
23	* For history and the complete list of supported I/O Controller Hub's
24	* see i8xx_tco.c
25	*/
26
27
28	/*
29	* Some address definitions for the TCO
30	*/
31
32	/* PCI configuration registers */
33	#define ESB_CONFIG_REG 0x60 /* Config register */
34	#define ESB_LOCK_REG 0x68 /* WDT lock register */
35
36	/* Memory mapped registers */
37	#define ESB_TIMER1_REG BASEADDR + 0x00 /* Timer1 value after each reset */
38	#define ESB_TIMER2_REG BASEADDR + 0x04 /* Timer2 value after each reset */
39	#define ESB_GINTSR_REG BASEADDR + 0x08 /* General Interrupt Status Register */
40	#define ESB_RELOAD_REG BASEADDR + 0x0c /* Reload register */
41
42
43	/*
44	* Some register bits
45	*/
46
47	/* Lock register bits */
48	#define ESB_WDT_FUNC ( 0x01 << 2 ) /* Watchdog functionality */
49	#define ESB_WDT_ENABLE ( 0x01 << 1 ) /* Enable WDT */
50	#define ESB_WDT_LOCK ( 0x01 << 0 ) /* Lock (nowayout) */
51
52	/* Config register bits */
53	#define ESB_WDT_REBOOT ( 0x01 << 5 ) /* Enable reboot on timeout */
54	#define ESB_WDT_FREQ ( 0x01 << 2 ) /* Decrement frequency */
55	#define ESB_WDT_INTTYPE ( 0x11 << 0 ) /* Interrupt type on timer1 timeout */
56
57	/* Reload register bits */
58	#define ESB_WDT_RELOAD ( 0x01 << 8 ) /* prevent timeout */
59
60	/*
61	* Some magic constants
62	*/
63	#define ESB_UNLOCK1 0x80 /* Step 1 to unlock reset registers */
64	#define ESB_UNLOCK2 0x86 /* Step 2 to unlock reset registers */