diff options
Diffstat (limited to 'drivers/char')
-rw-r--r-- | drivers/char/agp/amd64-agp.c | 85 | ||||
-rw-r--r-- | drivers/char/hvc_xen.c | 61 |
2 files changed, 82 insertions, 64 deletions
diff --git a/drivers/char/agp/amd64-agp.c b/drivers/char/agp/amd64-agp.c index 13665db363d6..481ffe87c716 100644 --- a/drivers/char/agp/amd64-agp.c +++ b/drivers/char/agp/amd64-agp.c | |||
@@ -16,28 +16,9 @@ | |||
16 | #include <asm/page.h> /* PAGE_SIZE */ | 16 | #include <asm/page.h> /* PAGE_SIZE */ |
17 | #include <asm/e820.h> | 17 | #include <asm/e820.h> |
18 | #include <asm/k8.h> | 18 | #include <asm/k8.h> |
19 | #include <asm/gart.h> | ||
19 | #include "agp.h" | 20 | #include "agp.h" |
20 | 21 | ||
21 | /* PTE bits. */ | ||
22 | #define GPTE_VALID 1 | ||
23 | #define GPTE_COHERENT 2 | ||
24 | |||
25 | /* Aperture control register bits. */ | ||
26 | #define GARTEN (1<<0) | ||
27 | #define DISGARTCPU (1<<4) | ||
28 | #define DISGARTIO (1<<5) | ||
29 | |||
30 | /* GART cache control register bits. */ | ||
31 | #define INVGART (1<<0) | ||
32 | #define GARTPTEERR (1<<1) | ||
33 | |||
34 | /* K8 On-cpu GART registers */ | ||
35 | #define AMD64_GARTAPERTURECTL 0x90 | ||
36 | #define AMD64_GARTAPERTUREBASE 0x94 | ||
37 | #define AMD64_GARTTABLEBASE 0x98 | ||
38 | #define AMD64_GARTCACHECTL 0x9c | ||
39 | #define AMD64_GARTEN (1<<0) | ||
40 | |||
41 | /* NVIDIA K8 registers */ | 22 | /* NVIDIA K8 registers */ |
42 | #define NVIDIA_X86_64_0_APBASE 0x10 | 23 | #define NVIDIA_X86_64_0_APBASE 0x10 |
43 | #define NVIDIA_X86_64_1_APBASE1 0x50 | 24 | #define NVIDIA_X86_64_1_APBASE1 0x50 |
@@ -165,29 +146,18 @@ static int amd64_fetch_size(void) | |||
165 | * In a multiprocessor x86-64 system, this function gets | 146 | * In a multiprocessor x86-64 system, this function gets |
166 | * called once for each CPU. | 147 | * called once for each CPU. |
167 | */ | 148 | */ |
168 | static u64 amd64_configure (struct pci_dev *hammer, u64 gatt_table) | 149 | static u64 amd64_configure(struct pci_dev *hammer, u64 gatt_table) |
169 | { | 150 | { |
170 | u64 aperturebase; | 151 | u64 aperturebase; |
171 | u32 tmp; | 152 | u32 tmp; |
172 | u64 addr, aper_base; | 153 | u64 aper_base; |
173 | 154 | ||
174 | /* Address to map to */ | 155 | /* Address to map to */ |
175 | pci_read_config_dword (hammer, AMD64_GARTAPERTUREBASE, &tmp); | 156 | pci_read_config_dword(hammer, AMD64_GARTAPERTUREBASE, &tmp); |
176 | aperturebase = tmp << 25; | 157 | aperturebase = tmp << 25; |
177 | aper_base = (aperturebase & PCI_BASE_ADDRESS_MEM_MASK); | 158 | aper_base = (aperturebase & PCI_BASE_ADDRESS_MEM_MASK); |
178 | 159 | ||
179 | /* address of the mappings table */ | 160 | enable_gart_translation(hammer, gatt_table); |
180 | addr = (u64) gatt_table; | ||
181 | addr >>= 12; | ||
182 | tmp = (u32) addr<<4; | ||
183 | tmp &= ~0xf; | ||
184 | pci_write_config_dword (hammer, AMD64_GARTTABLEBASE, tmp); | ||
185 | |||
186 | /* Enable GART translation for this hammer. */ | ||
187 | pci_read_config_dword(hammer, AMD64_GARTAPERTURECTL, &tmp); | ||
188 | tmp |= GARTEN; | ||
189 | tmp &= ~(DISGARTCPU | DISGARTIO); | ||
190 | pci_write_config_dword(hammer, AMD64_GARTAPERTURECTL, tmp); | ||
191 | 161 | ||
192 | return aper_base; | 162 | return aper_base; |
193 | } | 163 | } |
@@ -226,9 +196,9 @@ static void amd64_cleanup(void) | |||
226 | for (i = 0; i < num_k8_northbridges; i++) { | 196 | for (i = 0; i < num_k8_northbridges; i++) { |
227 | struct pci_dev *dev = k8_northbridges[i]; | 197 | struct pci_dev *dev = k8_northbridges[i]; |
228 | /* disable gart translation */ | 198 | /* disable gart translation */ |
229 | pci_read_config_dword (dev, AMD64_GARTAPERTURECTL, &tmp); | 199 | pci_read_config_dword(dev, AMD64_GARTAPERTURECTL, &tmp); |
230 | tmp &= ~AMD64_GARTEN; | 200 | tmp &= ~AMD64_GARTEN; |
231 | pci_write_config_dword (dev, AMD64_GARTAPERTURECTL, tmp); | 201 | pci_write_config_dword(dev, AMD64_GARTAPERTURECTL, tmp); |
232 | } | 202 | } |
233 | } | 203 | } |
234 | 204 | ||
@@ -258,24 +228,10 @@ static const struct agp_bridge_driver amd_8151_driver = { | |||
258 | }; | 228 | }; |
259 | 229 | ||
260 | /* Some basic sanity checks for the aperture. */ | 230 | /* Some basic sanity checks for the aperture. */ |
261 | static int __devinit aperture_valid(u64 aper, u32 size) | 231 | static int __devinit agp_aperture_valid(u64 aper, u32 size) |
262 | { | 232 | { |
263 | if (aper == 0) { | 233 | if (!aperture_valid(aper, size, 32*1024*1024)) |
264 | printk(KERN_ERR PFX "No aperture\n"); | ||
265 | return 0; | ||
266 | } | ||
267 | if (size < 32*1024*1024) { | ||
268 | printk(KERN_ERR PFX "Aperture too small (%d MB)\n", size>>20); | ||
269 | return 0; | ||
270 | } | ||
271 | if ((u64)aper + size > 0x100000000ULL) { | ||
272 | printk(KERN_ERR PFX "Aperture out of bounds\n"); | ||
273 | return 0; | 234 | return 0; |
274 | } | ||
275 | if (e820_any_mapped(aper, aper + size, E820_RAM)) { | ||
276 | printk(KERN_ERR PFX "Aperture pointing to RAM\n"); | ||
277 | return 0; | ||
278 | } | ||
279 | 235 | ||
280 | /* Request the Aperture. This catches cases when someone else | 236 | /* Request the Aperture. This catches cases when someone else |
281 | already put a mapping in there - happens with some very broken BIOS | 237 | already put a mapping in there - happens with some very broken BIOS |
@@ -308,11 +264,11 @@ static __devinit int fix_northbridge(struct pci_dev *nb, struct pci_dev *agp, | |||
308 | u32 nb_order, nb_base; | 264 | u32 nb_order, nb_base; |
309 | u16 apsize; | 265 | u16 apsize; |
310 | 266 | ||
311 | pci_read_config_dword(nb, 0x90, &nb_order); | 267 | pci_read_config_dword(nb, AMD64_GARTAPERTURECTL, &nb_order); |
312 | nb_order = (nb_order >> 1) & 7; | 268 | nb_order = (nb_order >> 1) & 7; |
313 | pci_read_config_dword(nb, 0x94, &nb_base); | 269 | pci_read_config_dword(nb, AMD64_GARTAPERTUREBASE, &nb_base); |
314 | nb_aper = nb_base << 25; | 270 | nb_aper = nb_base << 25; |
315 | if (aperture_valid(nb_aper, (32*1024*1024)<<nb_order)) { | 271 | if (agp_aperture_valid(nb_aper, (32*1024*1024)<<nb_order)) { |
316 | return 0; | 272 | return 0; |
317 | } | 273 | } |
318 | 274 | ||
@@ -331,12 +287,23 @@ static __devinit int fix_northbridge(struct pci_dev *nb, struct pci_dev *agp, | |||
331 | pci_read_config_dword(agp, 0x10, &aper_low); | 287 | pci_read_config_dword(agp, 0x10, &aper_low); |
332 | pci_read_config_dword(agp, 0x14, &aper_hi); | 288 | pci_read_config_dword(agp, 0x14, &aper_hi); |
333 | aper = (aper_low & ~((1<<22)-1)) | ((u64)aper_hi << 32); | 289 | aper = (aper_low & ~((1<<22)-1)) | ((u64)aper_hi << 32); |
290 | |||
291 | /* | ||
292 | * On some sick chips APSIZE is 0. This means it wants 4G | ||
293 | * so let double check that order, and lets trust the AMD NB settings | ||
294 | */ | ||
295 | if (order >=0 && aper + (32ULL<<(20 + order)) > 0x100000000ULL) { | ||
296 | printk(KERN_INFO "Aperture size %u MB is not right, using settings from NB\n", | ||
297 | 32 << order); | ||
298 | order = nb_order; | ||
299 | } | ||
300 | |||
334 | printk(KERN_INFO PFX "Aperture from AGP @ %Lx size %u MB\n", aper, 32 << order); | 301 | printk(KERN_INFO PFX "Aperture from AGP @ %Lx size %u MB\n", aper, 32 << order); |
335 | if (order < 0 || !aperture_valid(aper, (32*1024*1024)<<order)) | 302 | if (order < 0 || !agp_aperture_valid(aper, (32*1024*1024)<<order)) |
336 | return -1; | 303 | return -1; |
337 | 304 | ||
338 | pci_write_config_dword(nb, 0x90, order << 1); | 305 | pci_write_config_dword(nb, AMD64_GARTAPERTURECTL, order << 1); |
339 | pci_write_config_dword(nb, 0x94, aper >> 25); | 306 | pci_write_config_dword(nb, AMD64_GARTAPERTUREBASE, aper >> 25); |
340 | 307 | ||
341 | return 0; | 308 | return 0; |
342 | } | 309 | } |
diff --git a/drivers/char/hvc_xen.c b/drivers/char/hvc_xen.c index dd68f8541c2d..db2ae4216279 100644 --- a/drivers/char/hvc_xen.c +++ b/drivers/char/hvc_xen.c | |||
@@ -39,9 +39,14 @@ static int xencons_irq; | |||
39 | 39 | ||
40 | /* ------------------------------------------------------------------ */ | 40 | /* ------------------------------------------------------------------ */ |
41 | 41 | ||
42 | static unsigned long console_pfn = ~0ul; | ||
43 | |||
42 | static inline struct xencons_interface *xencons_interface(void) | 44 | static inline struct xencons_interface *xencons_interface(void) |
43 | { | 45 | { |
44 | return mfn_to_virt(xen_start_info->console.domU.mfn); | 46 | if (console_pfn == ~0ul) |
47 | return mfn_to_virt(xen_start_info->console.domU.mfn); | ||
48 | else | ||
49 | return __va(console_pfn << PAGE_SHIFT); | ||
45 | } | 50 | } |
46 | 51 | ||
47 | static inline void notify_daemon(void) | 52 | static inline void notify_daemon(void) |
@@ -101,20 +106,32 @@ static int __init xen_init(void) | |||
101 | { | 106 | { |
102 | struct hvc_struct *hp; | 107 | struct hvc_struct *hp; |
103 | 108 | ||
104 | if (!is_running_on_xen()) | 109 | if (!is_running_on_xen() || |
105 | return 0; | 110 | is_initial_xendomain() || |
111 | !xen_start_info->console.domU.evtchn) | ||
112 | return -ENODEV; | ||
106 | 113 | ||
107 | xencons_irq = bind_evtchn_to_irq(xen_start_info->console.domU.evtchn); | 114 | xencons_irq = bind_evtchn_to_irq(xen_start_info->console.domU.evtchn); |
108 | if (xencons_irq < 0) | 115 | if (xencons_irq < 0) |
109 | xencons_irq = 0 /* NO_IRQ */; | 116 | xencons_irq = 0; /* NO_IRQ */ |
117 | |||
110 | hp = hvc_alloc(HVC_COOKIE, xencons_irq, &hvc_ops, 256); | 118 | hp = hvc_alloc(HVC_COOKIE, xencons_irq, &hvc_ops, 256); |
111 | if (IS_ERR(hp)) | 119 | if (IS_ERR(hp)) |
112 | return PTR_ERR(hp); | 120 | return PTR_ERR(hp); |
113 | 121 | ||
114 | hvc = hp; | 122 | hvc = hp; |
123 | |||
124 | console_pfn = mfn_to_pfn(xen_start_info->console.domU.mfn); | ||
125 | |||
115 | return 0; | 126 | return 0; |
116 | } | 127 | } |
117 | 128 | ||
129 | void xen_console_resume(void) | ||
130 | { | ||
131 | if (xencons_irq) | ||
132 | rebind_evtchn_irq(xen_start_info->console.domU.evtchn, xencons_irq); | ||
133 | } | ||
134 | |||
118 | static void __exit xen_fini(void) | 135 | static void __exit xen_fini(void) |
119 | { | 136 | { |
120 | if (hvc) | 137 | if (hvc) |
@@ -134,12 +151,28 @@ module_init(xen_init); | |||
134 | module_exit(xen_fini); | 151 | module_exit(xen_fini); |
135 | console_initcall(xen_cons_init); | 152 | console_initcall(xen_cons_init); |
136 | 153 | ||
154 | static void raw_console_write(const char *str, int len) | ||
155 | { | ||
156 | while(len > 0) { | ||
157 | int rc = HYPERVISOR_console_io(CONSOLEIO_write, len, (char *)str); | ||
158 | if (rc <= 0) | ||
159 | break; | ||
160 | |||
161 | str += rc; | ||
162 | len -= rc; | ||
163 | } | ||
164 | } | ||
165 | |||
166 | #ifdef CONFIG_EARLY_PRINTK | ||
137 | static void xenboot_write_console(struct console *console, const char *string, | 167 | static void xenboot_write_console(struct console *console, const char *string, |
138 | unsigned len) | 168 | unsigned len) |
139 | { | 169 | { |
140 | unsigned int linelen, off = 0; | 170 | unsigned int linelen, off = 0; |
141 | const char *pos; | 171 | const char *pos; |
142 | 172 | ||
173 | raw_console_write(string, len); | ||
174 | |||
175 | write_console(0, "(early) ", 8); | ||
143 | while (off < len && NULL != (pos = strchr(string+off, '\n'))) { | 176 | while (off < len && NULL != (pos = strchr(string+off, '\n'))) { |
144 | linelen = pos-string+off; | 177 | linelen = pos-string+off; |
145 | if (off + linelen > len) | 178 | if (off + linelen > len) |
@@ -155,5 +188,23 @@ static void xenboot_write_console(struct console *console, const char *string, | |||
155 | struct console xenboot_console = { | 188 | struct console xenboot_console = { |
156 | .name = "xenboot", | 189 | .name = "xenboot", |
157 | .write = xenboot_write_console, | 190 | .write = xenboot_write_console, |
158 | .flags = CON_PRINTBUFFER | CON_BOOT, | 191 | .flags = CON_PRINTBUFFER | CON_BOOT | CON_ANYTIME, |
159 | }; | 192 | }; |
193 | #endif /* CONFIG_EARLY_PRINTK */ | ||
194 | |||
195 | void xen_raw_console_write(const char *str) | ||
196 | { | ||
197 | raw_console_write(str, strlen(str)); | ||
198 | } | ||
199 | |||
200 | void xen_raw_printk(const char *fmt, ...) | ||
201 | { | ||
202 | static char buf[512]; | ||
203 | va_list ap; | ||
204 | |||
205 | va_start(ap, fmt); | ||
206 | vsnprintf(buf, sizeof(buf), fmt, ap); | ||
207 | va_end(ap); | ||
208 | |||
209 | xen_raw_console_write(buf); | ||
210 | } | ||