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-rw-r--r--drivers/char/xilinx_hwicap/buffer_icap.c22
-rw-r--r--drivers/char/xilinx_hwicap/buffer_icap.h5
-rw-r--r--drivers/char/xilinx_hwicap/fifo_icap.c31
-rw-r--r--drivers/char/xilinx_hwicap/fifo_icap.h1
-rw-r--r--drivers/char/xilinx_hwicap/xilinx_hwicap.c2
-rw-r--r--drivers/char/xilinx_hwicap/xilinx_hwicap.h24
6 files changed, 58 insertions, 27 deletions
diff --git a/drivers/char/xilinx_hwicap/buffer_icap.c b/drivers/char/xilinx_hwicap/buffer_icap.c
index f577daedb630..aa7f7962a9a0 100644
--- a/drivers/char/xilinx_hwicap/buffer_icap.c
+++ b/drivers/char/xilinx_hwicap/buffer_icap.c
@@ -74,7 +74,7 @@
74 74
75/** 75/**
76 * buffer_icap_get_status - Get the contents of the status register. 76 * buffer_icap_get_status - Get the contents of the status register.
77 * @base_address: is the base address of the device 77 * @drvdata: a pointer to the drvdata.
78 * 78 *
79 * The status register contains the ICAP status and the done bit. 79 * The status register contains the ICAP status and the done bit.
80 * 80 *
@@ -88,9 +88,9 @@
88 * D1 - Always 1 88 * D1 - Always 1
89 * D0 - Done bit 89 * D0 - Done bit
90 **/ 90 **/
91static inline u32 buffer_icap_get_status(void __iomem *base_address) 91u32 buffer_icap_get_status(struct hwicap_drvdata *drvdata)
92{ 92{
93 return in_be32(base_address + XHI_STATUS_REG_OFFSET); 93 return in_be32(drvdata->base_address + XHI_STATUS_REG_OFFSET);
94} 94}
95 95
96/** 96/**
@@ -117,20 +117,8 @@ static inline u32 buffer_icap_get_bram(void __iomem *base_address,
117 **/ 117 **/
118static inline bool buffer_icap_busy(void __iomem *base_address) 118static inline bool buffer_icap_busy(void __iomem *base_address)
119{ 119{
120 return (buffer_icap_get_status(base_address) & 1) == XHI_NOT_FINISHED; 120 u32 status = in_be32(base_address + XHI_STATUS_REG_OFFSET);
121} 121 return (status & 1) == XHI_NOT_FINISHED;
122
123/**
124 * buffer_icap_busy - Return true if the icap device is not busy
125 * @base_address: is the base address of the device
126 *
127 * The queries the low order bit of the status register, which
128 * indicates whether the current configuration or readback operation
129 * has completed.
130 **/
131static inline bool buffer_icap_done(void __iomem *base_address)
132{
133 return (buffer_icap_get_status(base_address) & 1) == XHI_FINISHED;
134} 122}
135 123
136/** 124/**
diff --git a/drivers/char/xilinx_hwicap/buffer_icap.h b/drivers/char/xilinx_hwicap/buffer_icap.h
index 03184959fa00..c5b1840906b2 100644
--- a/drivers/char/xilinx_hwicap/buffer_icap.h
+++ b/drivers/char/xilinx_hwicap/buffer_icap.h
@@ -44,8 +44,6 @@
44#include <asm/io.h> 44#include <asm/io.h>
45#include "xilinx_hwicap.h" 45#include "xilinx_hwicap.h"
46 46
47void buffer_icap_reset(struct hwicap_drvdata *drvdata);
48
49/* Loads a partial bitstream from system memory. */ 47/* Loads a partial bitstream from system memory. */
50int buffer_icap_set_configuration(struct hwicap_drvdata *drvdata, u32 *data, 48int buffer_icap_set_configuration(struct hwicap_drvdata *drvdata, u32 *data,
51 u32 Size); 49 u32 Size);
@@ -54,4 +52,7 @@ int buffer_icap_set_configuration(struct hwicap_drvdata *drvdata, u32 *data,
54int buffer_icap_get_configuration(struct hwicap_drvdata *drvdata, u32 *data, 52int buffer_icap_get_configuration(struct hwicap_drvdata *drvdata, u32 *data,
55 u32 Size); 53 u32 Size);
56 54
55u32 buffer_icap_get_status(struct hwicap_drvdata *drvdata);
56void buffer_icap_reset(struct hwicap_drvdata *drvdata);
57
57#endif 58#endif
diff --git a/drivers/char/xilinx_hwicap/fifo_icap.c b/drivers/char/xilinx_hwicap/fifo_icap.c
index 6f45dbd47125..776b50528478 100644
--- a/drivers/char/xilinx_hwicap/fifo_icap.c
+++ b/drivers/char/xilinx_hwicap/fifo_icap.c
@@ -78,13 +78,6 @@
78#define XHI_CR_READ_MASK 0x00000002 /* Read from ICAP to FIFO */ 78#define XHI_CR_READ_MASK 0x00000002 /* Read from ICAP to FIFO */
79#define XHI_CR_WRITE_MASK 0x00000001 /* Write from FIFO to ICAP */ 79#define XHI_CR_WRITE_MASK 0x00000001 /* Write from FIFO to ICAP */
80 80
81/* Status Register (SR) */
82#define XHI_SR_CFGERR_N_MASK 0x00000100 /* Config Error Mask */
83#define XHI_SR_DALIGN_MASK 0x00000080 /* Data Alignment Mask */
84#define XHI_SR_RIP_MASK 0x00000040 /* Read back Mask */
85#define XHI_SR_IN_ABORT_N_MASK 0x00000020 /* Select Map Abort Mask */
86#define XHI_SR_DONE_MASK 0x00000001 /* Done bit Mask */
87
88 81
89#define XHI_WFO_MAX_VACANCY 1024 /* Max Write FIFO Vacancy, in words */ 82#define XHI_WFO_MAX_VACANCY 1024 /* Max Write FIFO Vacancy, in words */
90#define XHI_RFO_MAX_OCCUPANCY 256 /* Max Read FIFO Occupancy, in words */ 83#define XHI_RFO_MAX_OCCUPANCY 256 /* Max Read FIFO Occupancy, in words */
@@ -152,13 +145,35 @@ static inline void fifo_icap_start_readback(struct hwicap_drvdata *drvdata)
152} 145}
153 146
154/** 147/**
148 * fifo_icap_get_status - Get the contents of the status register.
149 * @drvdata: a pointer to the drvdata.
150 *
151 * The status register contains the ICAP status and the done bit.
152 *
153 * D8 - cfgerr
154 * D7 - dalign
155 * D6 - rip
156 * D5 - in_abort_l
157 * D4 - Always 1
158 * D3 - Always 1
159 * D2 - Always 1
160 * D1 - Always 1
161 * D0 - Done bit
162 **/
163u32 fifo_icap_get_status(struct hwicap_drvdata *drvdata)
164{
165 u32 status = in_be32(drvdata->base_address + XHI_SR_OFFSET);
166 dev_dbg(drvdata->dev, "Getting status = %x\n", status);
167 return status;
168}
169
170/**
155 * fifo_icap_busy - Return true if the ICAP is still processing a transaction. 171 * fifo_icap_busy - Return true if the ICAP is still processing a transaction.
156 * @drvdata: a pointer to the drvdata. 172 * @drvdata: a pointer to the drvdata.
157 **/ 173 **/
158static inline u32 fifo_icap_busy(struct hwicap_drvdata *drvdata) 174static inline u32 fifo_icap_busy(struct hwicap_drvdata *drvdata)
159{ 175{
160 u32 status = in_be32(drvdata->base_address + XHI_SR_OFFSET); 176 u32 status = in_be32(drvdata->base_address + XHI_SR_OFFSET);
161 dev_dbg(drvdata->dev, "Getting status = %x\n", status);
162 return (status & XHI_SR_DONE_MASK) ? 0 : 1; 177 return (status & XHI_SR_DONE_MASK) ? 0 : 1;
163} 178}
164 179
diff --git a/drivers/char/xilinx_hwicap/fifo_icap.h b/drivers/char/xilinx_hwicap/fifo_icap.h
index 4d3068dd0405..ffabd3ba2bd8 100644
--- a/drivers/char/xilinx_hwicap/fifo_icap.h
+++ b/drivers/char/xilinx_hwicap/fifo_icap.h
@@ -56,6 +56,7 @@ int fifo_icap_set_configuration(
56 u32 *FrameBuffer, 56 u32 *FrameBuffer,
57 u32 NumWords); 57 u32 NumWords);
58 58
59u32 fifo_icap_get_status(struct hwicap_drvdata *drvdata);
59void fifo_icap_reset(struct hwicap_drvdata *drvdata); 60void fifo_icap_reset(struct hwicap_drvdata *drvdata);
60void fifo_icap_flush_fifo(struct hwicap_drvdata *drvdata); 61void fifo_icap_flush_fifo(struct hwicap_drvdata *drvdata);
61 62
diff --git a/drivers/char/xilinx_hwicap/xilinx_hwicap.c b/drivers/char/xilinx_hwicap/xilinx_hwicap.c
index 2284fa2a5a57..304727deaf3b 100644
--- a/drivers/char/xilinx_hwicap/xilinx_hwicap.c
+++ b/drivers/char/xilinx_hwicap/xilinx_hwicap.c
@@ -664,12 +664,14 @@ static int __devinit hwicap_setup(struct device *dev, int id,
664static struct hwicap_driver_config buffer_icap_config = { 664static struct hwicap_driver_config buffer_icap_config = {
665 .get_configuration = buffer_icap_get_configuration, 665 .get_configuration = buffer_icap_get_configuration,
666 .set_configuration = buffer_icap_set_configuration, 666 .set_configuration = buffer_icap_set_configuration,
667 .get_status = buffer_icap_get_status,
667 .reset = buffer_icap_reset, 668 .reset = buffer_icap_reset,
668}; 669};
669 670
670static struct hwicap_driver_config fifo_icap_config = { 671static struct hwicap_driver_config fifo_icap_config = {
671 .get_configuration = fifo_icap_get_configuration, 672 .get_configuration = fifo_icap_get_configuration,
672 .set_configuration = fifo_icap_set_configuration, 673 .set_configuration = fifo_icap_set_configuration,
674 .get_status = fifo_icap_get_status,
673 .reset = fifo_icap_reset, 675 .reset = fifo_icap_reset,
674}; 676};
675 677
diff --git a/drivers/char/xilinx_hwicap/xilinx_hwicap.h b/drivers/char/xilinx_hwicap/xilinx_hwicap.h
index 405fee7e189b..1f9c8b082dbe 100644
--- a/drivers/char/xilinx_hwicap/xilinx_hwicap.h
+++ b/drivers/char/xilinx_hwicap/xilinx_hwicap.h
@@ -65,10 +65,27 @@ struct hwicap_drvdata {
65}; 65};
66 66
67struct hwicap_driver_config { 67struct hwicap_driver_config {
68 /* Read configuration data given by size into the data buffer.
69 Return 0 if successful. */
68 int (*get_configuration)(struct hwicap_drvdata *drvdata, u32 *data, 70 int (*get_configuration)(struct hwicap_drvdata *drvdata, u32 *data,
69 u32 size); 71 u32 size);
72 /* Write configuration data given by size from the data buffer.
73 Return 0 if successful. */
70 int (*set_configuration)(struct hwicap_drvdata *drvdata, u32 *data, 74 int (*set_configuration)(struct hwicap_drvdata *drvdata, u32 *data,
71 u32 size); 75 u32 size);
76 /* Get the status register, bit pattern given by:
77 * D8 - 0 = configuration error
78 * D7 - 1 = alignment found
79 * D6 - 1 = readback in progress
80 * D5 - 0 = abort in progress
81 * D4 - Always 1
82 * D3 - Always 1
83 * D2 - Always 1
84 * D1 - Always 1
85 * D0 - 1 = operation completed
86 */
87 u32 (*get_status)(struct hwicap_drvdata *drvdata);
88 /* Reset the hw */
72 void (*reset)(struct hwicap_drvdata *drvdata); 89 void (*reset)(struct hwicap_drvdata *drvdata);
73}; 90};
74 91
@@ -163,6 +180,13 @@ struct config_registers {
163/* Constant to use for CRC check when CRC has been disabled */ 180/* Constant to use for CRC check when CRC has been disabled */
164#define XHI_DISABLED_AUTO_CRC 0x0000DEFCUL 181#define XHI_DISABLED_AUTO_CRC 0x0000DEFCUL
165 182
183/* Meanings of the bits returned by get_status */
184#define XHI_SR_CFGERR_N_MASK 0x00000100 /* Config Error Mask */
185#define XHI_SR_DALIGN_MASK 0x00000080 /* Data Alignment Mask */
186#define XHI_SR_RIP_MASK 0x00000040 /* Read back Mask */
187#define XHI_SR_IN_ABORT_N_MASK 0x00000020 /* Select Map Abort Mask */
188#define XHI_SR_DONE_MASK 0x00000001 /* Done bit Mask */
189
166/** 190/**
167 * hwicap_type_1_read - Generates a Type 1 read packet header. 191 * hwicap_type_1_read - Generates a Type 1 read packet header.
168 * @reg: is the address of the register to be read back. 192 * @reg: is the address of the register to be read back.