aboutsummaryrefslogtreecommitdiffstats
path: root/drivers/char/watchdog/pcwd.c
diff options
context:
space:
mode:
Diffstat (limited to 'drivers/char/watchdog/pcwd.c')
-rw-r--r--drivers/char/watchdog/pcwd.c24
1 files changed, 13 insertions, 11 deletions
diff --git a/drivers/char/watchdog/pcwd.c b/drivers/char/watchdog/pcwd.c
index 1112ec8e61f3..0635cd724365 100644
--- a/drivers/char/watchdog/pcwd.c
+++ b/drivers/char/watchdog/pcwd.c
@@ -87,22 +87,24 @@
87#define PCWD_REVISION_C 2 87#define PCWD_REVISION_C 2
88 88
89/* 89/*
90 * These are the defines that describe the control status #1 bits for the 90 * These are the defines that describe the control status bits for the
91 * PC Watchdog card, revision A. 91 * PCI-PC Watchdog card.
92 */ 92*/
93/* Port 1 : Control Status #1 for the PC Watchdog card, revision A. */
93#define WD_WDRST 0x01 /* Previously reset state */ 94#define WD_WDRST 0x01 /* Previously reset state */
94#define WD_T110 0x02 /* Temperature overheat sense */ 95#define WD_T110 0x02 /* Temperature overheat sense */
95#define WD_HRTBT 0x04 /* Heartbeat sense */ 96#define WD_HRTBT 0x04 /* Heartbeat sense */
96#define WD_RLY2 0x08 /* External relay triggered */ 97#define WD_RLY2 0x08 /* External relay triggered */
97#define WD_SRLY2 0x80 /* Software external relay triggered */ 98#define WD_SRLY2 0x80 /* Software external relay triggered */
98 99/* Port 1 : Control Status #1 for the PC Watchdog card, revision C. */
99/*
100 * These are the defines that describe the control status #1 bits for the
101 * PC Watchdog card, revision C.
102 */
103#define WD_REVC_WTRP 0x01 /* Watchdog Trip status */ 100#define WD_REVC_WTRP 0x01 /* Watchdog Trip status */
104#define WD_REVC_HRBT 0x02 /* Watchdog Heartbeat */ 101#define WD_REVC_HRBT 0x02 /* Watchdog Heartbeat */
105#define WD_REVC_TTRP 0x04 /* Temperature Trip status */ 102#define WD_REVC_TTRP 0x04 /* Temperature Trip status */
103/* Port 2 : Control Status #2 */
104#define WD_WDIS 0x10 /* Watchdog Disabled */
105#define WD_ENTP 0x20 /* Watchdog Enable Temperature Trip */
106#define WD_SSEL 0x40 /* Watchdog Switch Select (1:SW1 <-> 0:SW2) */
107#define WD_WCMD 0x80 /* Watchdog Command Mode */
106 108
107/* max. time we give an ISA watchdog card to process a command */ 109/* max. time we give an ISA watchdog card to process a command */
108/* 500ms for each 4 bit response (according to spec.) */ 110/* 500ms for each 4 bit response (according to spec.) */
@@ -166,7 +168,7 @@ static int send_isa_command(int cmd)
166 int port0, last_port0; /* Double read for stabilising */ 168 int port0, last_port0; /* Double read for stabilising */
167 169
168 /* The WCMD bit must be 1 and the command is only 4 bits in size */ 170 /* The WCMD bit must be 1 and the command is only 4 bits in size */
169 control_status = (cmd & 0x0F) | 0x80; 171 control_status = (cmd & 0x0F) | WD_WCMD;
170 outb_p(control_status, pcwd_private.io_addr + 2); 172 outb_p(control_status, pcwd_private.io_addr + 2);
171 udelay(ISA_COMMAND_TIMEOUT); 173 udelay(ISA_COMMAND_TIMEOUT);
172 174
@@ -267,7 +269,7 @@ static int pcwd_start(void)
267 udelay(ISA_COMMAND_TIMEOUT); 269 udelay(ISA_COMMAND_TIMEOUT);
268 stat_reg = inb_p(pcwd_private.io_addr + 2); 270 stat_reg = inb_p(pcwd_private.io_addr + 2);
269 spin_unlock(&pcwd_private.io_lock); 271 spin_unlock(&pcwd_private.io_lock);
270 if (stat_reg & 0x10) { 272 if (stat_reg & WD_WDIS) {
271 printk(KERN_INFO PFX "Could not start watchdog\n"); 273 printk(KERN_INFO PFX "Could not start watchdog\n");
272 return -EIO; 274 return -EIO;
273 } 275 }
@@ -291,7 +293,7 @@ static int pcwd_stop(void)
291 udelay(ISA_COMMAND_TIMEOUT); 293 udelay(ISA_COMMAND_TIMEOUT);
292 stat_reg = inb_p(pcwd_private.io_addr + 2); 294 stat_reg = inb_p(pcwd_private.io_addr + 2);
293 spin_unlock(&pcwd_private.io_lock); 295 spin_unlock(&pcwd_private.io_lock);
294 if ((stat_reg & 0x10) == 0) { 296 if ((stat_reg & WD_WDIS) == 0) {
295 printk(KERN_INFO PFX "Could not stop watchdog\n"); 297 printk(KERN_INFO PFX "Could not stop watchdog\n");
296 return -EIO; 298 return -EIO;
297 } 299 }