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path: root/drivers/char/hw_random/via-rng.c
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-rw-r--r--drivers/char/hw_random/via-rng.c15
1 files changed, 14 insertions, 1 deletions
diff --git a/drivers/char/hw_random/via-rng.c b/drivers/char/hw_random/via-rng.c
index 4e9573c1d39e..794aacb715c1 100644
--- a/drivers/char/hw_random/via-rng.c
+++ b/drivers/char/hw_random/via-rng.c
@@ -132,6 +132,19 @@ static int via_rng_init(struct hwrng *rng)
132 struct cpuinfo_x86 *c = &cpu_data(0); 132 struct cpuinfo_x86 *c = &cpu_data(0);
133 u32 lo, hi, old_lo; 133 u32 lo, hi, old_lo;
134 134
135 /* VIA Nano CPUs don't have the MSR_VIA_RNG anymore. The RNG
136 * is always enabled if CPUID rng_en is set. There is no
137 * RNG configuration like it used to be the case in this
138 * register */
139 if ((c->x86 == 6) && (c->x86_model >= 0x0f)) {
140 if (!cpu_has_xstore_enabled) {
141 printk(KERN_ERR PFX "can't enable hardware RNG "
142 "if XSTORE is not enabled\n");
143 return -ENODEV;
144 }
145 return 0;
146 }
147
135 /* Control the RNG via MSR. Tread lightly and pay very close 148 /* Control the RNG via MSR. Tread lightly and pay very close
136 * close attention to values written, as the reserved fields 149 * close attention to values written, as the reserved fields
137 * are documented to be "undefined and unpredictable"; but it 150 * are documented to be "undefined and unpredictable"; but it
@@ -205,5 +218,5 @@ static void __exit mod_exit(void)
205module_init(mod_init); 218module_init(mod_init);
206module_exit(mod_exit); 219module_exit(mod_exit);
207 220
208MODULE_DESCRIPTION("H/W RNG driver for VIA chipsets"); 221MODULE_DESCRIPTION("H/W RNG driver for VIA CPU with PadLock");
209MODULE_LICENSE("GPL"); 222MODULE_LICENSE("GPL");