litmus-rt.git - The LITMUS^RT kernel.

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Diffstat (limited to 'drivers/char/efirtc.c')

-rw-r--r--

1 files changed, 1 insertions, 1 deletions


diff --git a/drivers/char/efirtc.c b/drivers/char/efirtc.c index 0090e7a4fcd3..004141d535a2 100644 --- a/drivers/char/efirtc.c +++ b/drivers/char/efirtc.c
@@ -285,7 +285,7 @@ efi_rtc_close(struct inode inode, struct file file)
285	* The various file operations we support.	285	* The various file operations we support.
286	*/	286	*/
287		287
288	static struct file_operations efi_rtc_fops = {	288	static const struct file_operations efi_rtc_fops = {
289	.owner = THIS_MODULE,	289	.owner = THIS_MODULE,
290	.ioctl = efi_rtc_ioctl,	290	.ioctl = efi_rtc_ioctl,
291	.open = efi_rtc_open,	291	.open = efi_rtc_open,

/* * Emma Mobile GPIO Support - GIO * * Copyright (C) 2012 Magnus Damm * * This program is free software; you can redistribute it and/or modify * it under the terms of the GNU General Public License as published by * the Free Software Foundation; either version 2 of the License * * This program is distributed in the hope that it will be useful, * but WITHOUT ANY WARRANTY; without even the implied warranty of * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the * GNU General Public License for more details. * * You should have received a copy of the GNU General Public License * along with this program; if not, write to the Free Software * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA */ #include <linux/init.h> #include <linux/platform_device.h> #include <linux/spinlock.h> #include <linux/interrupt.h> #include <linux/ioport.h> #include <linux/io.h> #include <linux/irq.h> #include <linux/irqdomain.h> #include <linux/bitops.h> #include <linux/err.h> #include <linux/gpio.h> #include <linux/slab.h> #include <linux/module.h> #include <linux/pinctrl/consumer.h> struct em_gio_priv { void __iomem *base0; void __iomem *base1; spinlock_t sense_lock; struct platform_device *pdev; struct gpio_chip gpio_chip; struct irq_chip irq_chip; struct irq_domain *irq_domain; }; #define GIO_E1 0x00 #define GIO_E0 0x04 #define GIO_EM 0x04 #define GIO_OL 0x08 #define GIO_OH 0x0c #define GIO_I 0x10 #define GIO_IIA 0x14 #define GIO_IEN 0x18 #define GIO_IDS 0x1c #define GIO_IIM 0x1c #define GIO_RAW 0x20 #define GIO_MST 0x24 #define GIO_IIR 0x28 #define GIO_IDT0 0x40 #define GIO_IDT1 0x44 #define GIO_IDT2 0x48 #define GIO_IDT3 0x4c #define GIO_RAWBL 0x50 #define GIO_RAWBH 0x54 #define GIO_IRBL 0x58 #define GIO_IRBH 0x5c #define GIO_IDT(n) (GIO_IDT0 + ((n) * 4)) static inline unsigned long em_gio_read(struct em_gio_priv *p, int offs) { if (offs < GIO_IDT0) return ioread32(p->base0 + offs); else return ioread32(p->base1 + (offs - GIO_IDT0)); } static inline void em_gio_write(struct em_gio_priv *p, int offs, unsigned long value) { if (offs < GIO_IDT0) iowrite32(value, p->base0 + offs); else iowrite32(value, p->base1 + (offs - GIO_IDT0)); } static void em_gio_irq_disable(struct irq_data *d) { struct em_gio_priv *p = irq_data_get_irq_chip_data(d); em_gio_write(p, GIO_IDS, BIT(irqd_to_hwirq(d))); } static void em_gio_irq_enable(struct irq_data *d) { struct em_gio_priv *p = irq_data_get_irq_chip_data(d); em_gio_write(p, GIO_IEN, BIT(irqd_to_hwirq(d))); } static int em_gio_irq_reqres(struct irq_data *d) { struct em_gio_priv *p = irq_data_get_irq_chip_data(d); if (gpiochip_lock_as_irq(&p->gpio_chip, irqd_to_hwirq(d))) { dev_err(p->gpio_chip.parent, "unable to lock HW IRQ %lu for IRQ\n", irqd_to_hwirq(d)); return -EINVAL; } return 0; } static void em_gio_irq_relres(struct irq_data *d) { struct em_gio_priv *p = irq_data_get_irq_chip_data(d);


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