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path: root/drivers/char/drm/savage_drm.h
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Diffstat (limited to 'drivers/char/drm/savage_drm.h')
-rw-r--r--drivers/char/drm/savage_drm.h53
1 files changed, 27 insertions, 26 deletions
diff --git a/drivers/char/drm/savage_drm.h b/drivers/char/drm/savage_drm.h
index 6526c9aa7589..e1148e8e7994 100644
--- a/drivers/char/drm/savage_drm.h
+++ b/drivers/char/drm/savage_drm.h
@@ -42,12 +42,13 @@
42#define SAVAGE_NR_TEX_REGIONS 16 42#define SAVAGE_NR_TEX_REGIONS 16
43#define SAVAGE_LOG_MIN_TEX_REGION_SIZE 16 43#define SAVAGE_LOG_MIN_TEX_REGION_SIZE 16
44 44
45#endif /* __SAVAGE_SAREA_DEFINES__ */ 45#endif /* __SAVAGE_SAREA_DEFINES__ */
46 46
47typedef struct _drm_savage_sarea { 47typedef struct _drm_savage_sarea {
48 /* LRU lists for texture memory in agp space and on the card. 48 /* LRU lists for texture memory in agp space and on the card.
49 */ 49 */
50 drm_tex_region_t texList[SAVAGE_NR_TEX_HEAPS][SAVAGE_NR_TEX_REGIONS+1]; 50 drm_tex_region_t texList[SAVAGE_NR_TEX_HEAPS][SAVAGE_NR_TEX_REGIONS +
51 1];
51 unsigned int texAge[SAVAGE_NR_TEX_HEAPS]; 52 unsigned int texAge[SAVAGE_NR_TEX_HEAPS];
52 53
53 /* Mechanism to validate card state. 54 /* Mechanism to validate card state.
@@ -101,24 +102,24 @@ typedef struct drm_savage_init {
101 102
102typedef union drm_savage_cmd_header drm_savage_cmd_header_t; 103typedef union drm_savage_cmd_header drm_savage_cmd_header_t;
103typedef struct drm_savage_cmdbuf { 104typedef struct drm_savage_cmdbuf {
104 /* command buffer in client's address space */ 105 /* command buffer in client's address space */
105 drm_savage_cmd_header_t __user *cmd_addr; 106 drm_savage_cmd_header_t __user *cmd_addr;
106 unsigned int size; /* size of the command buffer in 64bit units */ 107 unsigned int size; /* size of the command buffer in 64bit units */
107 108
108 unsigned int dma_idx; /* DMA buffer index to use */ 109 unsigned int dma_idx; /* DMA buffer index to use */
109 int discard; /* discard DMA buffer when done */ 110 int discard; /* discard DMA buffer when done */
110 /* vertex buffer in client's address space */ 111 /* vertex buffer in client's address space */
111 unsigned int __user *vb_addr; 112 unsigned int __user *vb_addr;
112 unsigned int vb_size; /* size of client vertex buffer in bytes */ 113 unsigned int vb_size; /* size of client vertex buffer in bytes */
113 unsigned int vb_stride; /* stride of vertices in 32bit words */ 114 unsigned int vb_stride; /* stride of vertices in 32bit words */
114 /* boxes in client's address space */ 115 /* boxes in client's address space */
115 drm_clip_rect_t __user *box_addr; 116 drm_clip_rect_t __user *box_addr;
116 unsigned int nbox; /* number of clipping boxes */ 117 unsigned int nbox; /* number of clipping boxes */
117} drm_savage_cmdbuf_t; 118} drm_savage_cmdbuf_t;
118 119
119#define SAVAGE_WAIT_2D 0x1 /* wait for 2D idle before updating event tag */ 120#define SAVAGE_WAIT_2D 0x1 /* wait for 2D idle before updating event tag */
120#define SAVAGE_WAIT_3D 0x2 /* wait for 3D idle before updating event tag */ 121#define SAVAGE_WAIT_3D 0x2 /* wait for 3D idle before updating event tag */
121#define SAVAGE_WAIT_IRQ 0x4 /* emit or wait for IRQ, not implemented yet */ 122#define SAVAGE_WAIT_IRQ 0x4 /* emit or wait for IRQ, not implemented yet */
122typedef struct drm_savage_event { 123typedef struct drm_savage_event {
123 unsigned int count; 124 unsigned int count;
124 unsigned int flags; 125 unsigned int flags;
@@ -126,21 +127,21 @@ typedef struct drm_savage_event {
126 127
127/* Commands for the cmdbuf ioctl 128/* Commands for the cmdbuf ioctl
128 */ 129 */
129#define SAVAGE_CMD_STATE 0 /* a range of state registers */ 130#define SAVAGE_CMD_STATE 0 /* a range of state registers */
130#define SAVAGE_CMD_DMA_PRIM 1 /* vertices from DMA buffer */ 131#define SAVAGE_CMD_DMA_PRIM 1 /* vertices from DMA buffer */
131#define SAVAGE_CMD_VB_PRIM 2 /* vertices from client vertex buffer */ 132#define SAVAGE_CMD_VB_PRIM 2 /* vertices from client vertex buffer */
132#define SAVAGE_CMD_DMA_IDX 3 /* indexed vertices from DMA buffer */ 133#define SAVAGE_CMD_DMA_IDX 3 /* indexed vertices from DMA buffer */
133#define SAVAGE_CMD_VB_IDX 4 /* indexed vertices client vertex buffer */ 134#define SAVAGE_CMD_VB_IDX 4 /* indexed vertices client vertex buffer */
134#define SAVAGE_CMD_CLEAR 5 /* clear buffers */ 135#define SAVAGE_CMD_CLEAR 5 /* clear buffers */
135#define SAVAGE_CMD_SWAP 6 /* swap buffers */ 136#define SAVAGE_CMD_SWAP 6 /* swap buffers */
136 137
137/* Primitive types 138/* Primitive types
138*/ 139*/
139#define SAVAGE_PRIM_TRILIST 0 /* triangle list */ 140#define SAVAGE_PRIM_TRILIST 0 /* triangle list */
140#define SAVAGE_PRIM_TRISTRIP 1 /* triangle strip */ 141#define SAVAGE_PRIM_TRISTRIP 1 /* triangle strip */
141#define SAVAGE_PRIM_TRIFAN 2 /* triangle fan */ 142#define SAVAGE_PRIM_TRIFAN 2 /* triangle fan */
142#define SAVAGE_PRIM_TRILIST_201 3 /* reorder verts for correct flat 143#define SAVAGE_PRIM_TRILIST_201 3 /* reorder verts for correct flat
143 * shading on s3d */ 144 * shading on s3d */
144 145
145/* Skip flags (vertex format) 146/* Skip flags (vertex format)
146 */ 147 */
@@ -172,38 +173,38 @@ union drm_savage_cmd_header {
172 unsigned short pad1; 173 unsigned short pad1;
173 unsigned short pad2; 174 unsigned short pad2;
174 unsigned short pad3; 175 unsigned short pad3;
175 } cmd; /* generic */ 176 } cmd; /* generic */
176 struct { 177 struct {
177 unsigned char cmd; 178 unsigned char cmd;
178 unsigned char global; /* need idle engine? */ 179 unsigned char global; /* need idle engine? */
179 unsigned short count; /* number of consecutive registers */ 180 unsigned short count; /* number of consecutive registers */
180 unsigned short start; /* first register */ 181 unsigned short start; /* first register */
181 unsigned short pad3; 182 unsigned short pad3;
182 } state; /* SAVAGE_CMD_STATE */ 183 } state; /* SAVAGE_CMD_STATE */
183 struct { 184 struct {
184 unsigned char cmd; 185 unsigned char cmd;
185 unsigned char prim; /* primitive type */ 186 unsigned char prim; /* primitive type */
186 unsigned short skip; /* vertex format (skip flags) */ 187 unsigned short skip; /* vertex format (skip flags) */
187 unsigned short count; /* number of vertices */ 188 unsigned short count; /* number of vertices */
188 unsigned short start; /* first vertex in DMA/vertex buffer */ 189 unsigned short start; /* first vertex in DMA/vertex buffer */
189 } prim; /* SAVAGE_CMD_DMA_PRIM, SAVAGE_CMD_VB_PRIM */ 190 } prim; /* SAVAGE_CMD_DMA_PRIM, SAVAGE_CMD_VB_PRIM */
190 struct { 191 struct {
191 unsigned char cmd; 192 unsigned char cmd;
192 unsigned char prim; 193 unsigned char prim;
193 unsigned short skip; 194 unsigned short skip;
194 unsigned short count; /* number of indices that follow */ 195 unsigned short count; /* number of indices that follow */
195 unsigned short pad3; 196 unsigned short pad3;
196 } idx; /* SAVAGE_CMD_DMA_IDX, SAVAGE_CMD_VB_IDX */ 197 } idx; /* SAVAGE_CMD_DMA_IDX, SAVAGE_CMD_VB_IDX */
197 struct { 198 struct {
198 unsigned char cmd; 199 unsigned char cmd;
199 unsigned char pad0; 200 unsigned char pad0;
200 unsigned short pad1; 201 unsigned short pad1;
201 unsigned int flags; 202 unsigned int flags;
202 } clear0; /* SAVAGE_CMD_CLEAR */ 203 } clear0; /* SAVAGE_CMD_CLEAR */
203 struct { 204 struct {
204 unsigned int mask; 205 unsigned int mask;
205 unsigned int value; 206 unsigned int value;
206 } clear1; /* SAVAGE_CMD_CLEAR data */ 207 } clear1; /* SAVAGE_CMD_CLEAR data */
207}; 208};
208 209
209#endif 210#endif