1 files changed, 18 insertions, 0 deletions

diff --git a/drivers/char/drm/radeon_state.c b/drivers/char/drm/radeon_state.c
index 64a3e3a406ef..c4325f1e2294 100644
--- a/drivers/char/drm/radeon_state.c
+++ b/drivers/char/drm/radeon_state.c
@@ -207,6 +207,15 @@ static __inline__ int radeon_check_and_fixup_packets( drm_radeon_private_t *dev_
         case RADEON_EMIT_PP_CUBIC_FACES_1:
         case RADEON_EMIT_PP_CUBIC_FACES_2:
         case R200_EMIT_PP_TRI_PERF_CNTL:
+        case R200_EMIT_PP_AFS_0:
+        case R200_EMIT_PP_AFS_1:
+        case R200_EMIT_ATF_TFACTOR:
+        case R200_EMIT_PP_TXCTLALL_0:
+        case R200_EMIT_PP_TXCTLALL_1:
+        case R200_EMIT_PP_TXCTLALL_2:
+        case R200_EMIT_PP_TXCTLALL_3:
+        case R200_EMIT_PP_TXCTLALL_4:
+        case R200_EMIT_PP_TXCTLALL_5:
                 /* These packets don't contain memory offsets */
                 break;
 
@@ -568,6 +577,15 @@ static struct {
         { RADEON_PP_CUBIC_FACES_2, 1, "RADEON_PP_CUBIC_FACES_2"},
         { RADEON_PP_CUBIC_OFFSET_T2_0, 5, "RADEON_PP_CUBIC_OFFSET_T2_0"},
         { R200_PP_TRI_PERF, 2, "R200_PP_TRI_PERF"},
+        { R200_PP_AFS_0, 32, "R200_PP_AFS_0"},     /* 85 */
+        { R200_PP_AFS_1, 32, "R200_PP_AFS_1"},
+        { R200_PP_TFACTOR_0, 8, "R200_ATF_TFACTOR"},
+        { R200_PP_TXFILTER_0, 8, "R200_PP_TXCTLALL_0"},
+        { R200_PP_TXFILTER_1, 8, "R200_PP_TXCTLALL_1"},
+        { R200_PP_TXFILTER_2, 8, "R200_PP_TXCTLALL_2"},
+        { R200_PP_TXFILTER_3, 8, "R200_PP_TXCTLALL_3"},
+        { R200_PP_TXFILTER_4, 8, "R200_PP_TXCTLALL_4"}, 
+        { R200_PP_TXFILTER_5, 8, "R200_PP_TXCTLALL_5"},
 };